usb: isp1760: Move PORT1 configuration to core code
Configuring the mode of operation of port 1 doesn't belong to the HCD code, as it's related to the soon to come UDC support. Move the configuration to core code. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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2 changed files with 8 additions and 9 deletions
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@ -67,6 +67,14 @@ static void isp1760_init_core(struct isp1760_device *isp)
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isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
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isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
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/*
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* PORT 1 Control register of the ISP1760 is the OTG control register on
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* ISP1761. Since there is no OTG or device controller support in this
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* driver, we use port 1 as a "normal" USB host port on both chips.
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*/
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isp1760_write32(isp->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2);
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usleep_range(10000, 11000);
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dev_info(isp->dev, "bus width: %u, oc: %s\n",
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isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
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isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
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@ -503,15 +503,6 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
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reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
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/*
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* PORT 1 Control register of the ISP1760 is the OTG control
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* register on ISP1761. Since there is no OTG or device controller
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* support in this driver, we use port 1 as a "normal" USB host port on
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* both chips.
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*/
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reg_write32(hcd->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2);
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mdelay(10);
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priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
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return priv_init(hcd);
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