Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: [PATCH] pata_via: Cable detect error [PATCH] Fix help text for CONFIG_ATA_PIIX [PATCH] initializer entry defined twice in pata_rz1000 [PATCH] ata: fix platform_device_register_simple() error check [PATCH] ahci: do not mangle saved HOST_CAP while resetting controller [PATCH] libata: don't initialize sg in ata_exec_internal() if DMA_NONE (take #2) [libata] sata_svw: Disable ATAPI DMA on current boards (errata workaround) [libata] use kmap_atomic(KM_IRQ0) in SCSI simulator [PATCH] ata_piix: use piix_host_stop() in ich_pata_ops [PATCH] ata_piix: IDE mode SATA patch for Intel ICH9
This commit is contained in:
commit
99f5e97181
11 changed files with 80 additions and 32 deletions
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@ -40,9 +40,9 @@ config ATA_PIIX
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tristate "Intel PIIX/ICH SATA support"
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depends on PCI
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help
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This option enables support for ICH5/6/7/8 Serial ATA.
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If PATA support was enabled previously, this enables
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support for select Intel PIIX/ICH PATA host controllers.
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This option enables support for ICH5/6/7/8 Serial ATA
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and support for PATA on the Intel PIIX3/PIIX4/ICH series
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PATA host controllers.
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If unsure, say N.
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@ -645,8 +645,6 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
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u32 cap_save, impl_save, tmp;
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cap_save = readl(mmio + HOST_CAP);
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cap_save &= ( (1<<28) | (1<<17) );
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cap_save |= (1 << 27);
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impl_save = readl(mmio + HOST_PORTS_IMPL);
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/* global controller reset */
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@ -226,14 +226,26 @@ static const struct pci_device_id piix_pci_tbl[] = {
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{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
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/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
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{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
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/* Enterprise Southbridge 2 (where's the datasheet?) */
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/* Enterprise Southbridge 2 (631xESB/632xESB) */
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{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
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/* SATA Controller 1 IDE (ICH8, no datasheet yet) */
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/* SATA Controller 1 IDE (ICH8) */
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{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller 2 IDE (ICH8, ditto) */
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/* SATA Controller 2 IDE (ICH8) */
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{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* Mobile SATA Controller IDE (ICH8M, ditto) */
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/* Mobile SATA Controller IDE (ICH8M) */
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{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9) */
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{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9) */
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{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9) */
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{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9M) */
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{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9M) */
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{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller IDE (ICH9M) */
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{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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{ } /* terminate list */
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};
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@ -330,7 +342,7 @@ static const struct ata_port_operations ich_pata_ops = {
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.port_start = ata_port_start,
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.port_stop = ata_port_stop,
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.host_stop = ata_host_stop,
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.host_stop = piix_host_stop,
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};
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static const struct ata_port_operations piix_sata_ops = {
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@ -1332,7 +1332,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
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}
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/**
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* ata_exec_internal_sg - execute libata internal command
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* ata_exec_internal - execute libata internal command
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* @dev: Device to which the command is sent
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* @tf: Taskfile registers for the command and the result
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* @cdb: CDB for packet command
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@ -1353,11 +1353,17 @@ unsigned ata_exec_internal(struct ata_device *dev,
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struct ata_taskfile *tf, const u8 *cdb,
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int dma_dir, void *buf, unsigned int buflen)
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{
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struct scatterlist sg;
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struct scatterlist *psg = NULL, sg;
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unsigned int n_elem = 0;
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if (dma_dir != DMA_NONE) {
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WARN_ON(!buf);
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sg_init_one(&sg, buf, buflen);
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psg = &sg;
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n_elem++;
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}
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return ata_exec_internal_sg(dev, tf, cdb, dma_dir, &sg, 1);
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return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
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}
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/**
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@ -1539,7 +1539,7 @@ static unsigned int ata_scsi_rbuf_get(struct scsi_cmnd *cmd, u8 **buf_out)
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struct scatterlist *sg;
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sg = (struct scatterlist *) cmd->request_buffer;
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buf = kmap_atomic(sg->page, KM_USER0) + sg->offset;
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buf = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
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buflen = sg->length;
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} else {
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buf = cmd->request_buffer;
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@ -1567,7 +1567,7 @@ static inline void ata_scsi_rbuf_put(struct scsi_cmnd *cmd, u8 *buf)
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struct scatterlist *sg;
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sg = (struct scatterlist *) cmd->request_buffer;
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kunmap_atomic(buf - sg->offset, KM_USER0);
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kunmap_atomic(buf - sg->offset, KM_IRQ0);
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}
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}
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@ -698,8 +698,10 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl
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goto fail_io;
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pdev = platform_device_register_simple(DRV_NAME, nr_legacy_host, NULL, 0);
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if (pdev == NULL)
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if (IS_ERR(pdev)) {
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ret = PTR_ERR(pdev);
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goto fail_dev;
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}
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if (ht6560a & mask) {
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ops = &ht6560a_port_ops;
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@ -247,8 +247,8 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i
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*/
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pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
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if (pdev == NULL)
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return -ENOMEM;
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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memset(&ae, 0, sizeof(struct ata_probe_ent));
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INIT_LIST_HEAD(&ae.node);
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@ -105,8 +105,6 @@ static struct ata_port_operations rz1000_port_ops = {
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.error_handler = rz1000_error_handler,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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@ -161,10 +161,15 @@ static int via_pre_reset(struct ata_port *ap)
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return -ENOENT;
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}
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if ((config->flags & VIA_UDMA) >= VIA_UDMA_66)
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if ((config->flags & VIA_UDMA) >= VIA_UDMA_100)
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ap->cbl = via_cable_detect(ap);
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else
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/* The UDMA66 series has no cable detect so do drive side detect */
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else if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA_UNK;
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return ata_std_prereset(ap);
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}
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@ -206,8 +206,8 @@ static __init int winbond_init_one(unsigned long port)
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*/
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pdev = platform_device_register_simple(DRV_NAME, nr_winbond_host, NULL, 0);
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if (pdev == NULL)
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return -ENOMEM;
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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memset(&ae, 0, sizeof(struct ata_probe_ent));
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INIT_LIST_HEAD(&ae.node);
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@ -56,6 +56,8 @@
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#define DRV_VERSION "2.0"
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enum {
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K2_FLAG_NO_ATAPI_DMA = (1 << 29),
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/* Taskfile registers offsets */
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K2_SATA_TF_CMD_OFFSET = 0x00,
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K2_SATA_TF_DATA_OFFSET = 0x00,
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@ -83,11 +85,33 @@ enum {
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/* Port stride */
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K2_SATA_PORT_OFFSET = 0x100,
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board_svw4 = 0,
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board_svw8 = 1,
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};
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static const struct k2_board_info {
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unsigned int n_ports;
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unsigned long port_flags;
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} k2_board_info[] = {
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/* board_svw4 */
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{ 4, K2_FLAG_NO_ATAPI_DMA },
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/* board_svw8 */
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{ 8, K2_FLAG_NO_ATAPI_DMA },
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};
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static u8 k2_stat_check_status(struct ata_port *ap);
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static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc)
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{
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if (qc->ap->flags & K2_FLAG_NO_ATAPI_DMA)
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return -1; /* ATAPI DMA not supported */
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return 0;
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}
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static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
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{
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if (sc_reg > SCR_CONTROL)
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.check_status = k2_stat_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.check_atapi_dma = k2_sata_check_atapi_dma,
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.bmdma_setup = k2_bmdma_setup_mmio,
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.bmdma_start = k2_bmdma_start_mmio,
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.bmdma_stop = ata_bmdma_stop,
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@ -359,6 +384,8 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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struct ata_probe_ent *probe_ent = NULL;
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unsigned long base;
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void __iomem *mmio_base;
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const struct k2_board_info *board_info =
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&k2_board_info[ent->driver_data];
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int pci_dev_busy = 0;
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int rc;
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int i;
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probe_ent->sht = &k2_sata_sht;
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probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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ATA_FLAG_MMIO;
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ATA_FLAG_MMIO | board_info->port_flags;
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probe_ent->port_ops = &k2_sata_ops;
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probe_ent->n_ports = 4;
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probe_ent->irq = pdev->irq;
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@ -441,7 +468,7 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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/* different controllers have different number of ports - currently 4 or 8 */
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/* All ports are on the same function. Multi-function device is no
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* longer available. This should not be seen in any system. */
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for (i = 0; i < ent->driver_data; i++)
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for (i = 0; i < board_info->n_ports; i++)
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k2_sata_setup_port(&probe_ent->port[i], base + i * K2_SATA_PORT_OFFSET);
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pci_set_master(pdev);
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@ -469,11 +496,11 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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* controller
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* */
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static const struct pci_device_id k2_sata_pci_tbl[] = {
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{ PCI_VDEVICE(SERVERWORKS, 0x0240), 4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x0241), 4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x0242), 8 },
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{ PCI_VDEVICE(SERVERWORKS, 0x024a), 4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x024b), 4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x0240), board_svw4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x0241), board_svw4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x0242), board_svw8 },
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{ PCI_VDEVICE(SERVERWORKS, 0x024a), board_svw4 },
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{ PCI_VDEVICE(SERVERWORKS, 0x024b), board_svw4 },
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{ }
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};
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