ARM: OMAP: Fix GPIO IRQ mask handling
The GPIO IRQ mask was retrieved incorrectly in cases where we have a mask register instead of an enable register. Also we should only return the valid bits depending on the bank size. This fixes a bug on 1510/1610 based OMAPs where GPIO IRQs are not delivered. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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1 changed files with 16 additions and 1 deletions
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@ -540,29 +540,44 @@ static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
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static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
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{
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void __iomem *reg = bank->base;
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int inv = 0;
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u32 l;
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u32 mask;
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switch (bank->method) {
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case METHOD_MPUIO:
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reg += OMAP_MPUIO_GPIO_MASKIT;
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mask = 0xffff;
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inv = 1;
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break;
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case METHOD_GPIO_1510:
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reg += OMAP1510_GPIO_INT_MASK;
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mask = 0xffff;
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inv = 1;
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break;
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case METHOD_GPIO_1610:
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reg += OMAP1610_GPIO_IRQENABLE1;
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mask = 0xffff;
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break;
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case METHOD_GPIO_730:
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reg += OMAP730_GPIO_INT_MASK;
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mask = 0xffffffff;
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inv = 1;
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break;
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case METHOD_GPIO_24XX:
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reg += OMAP24XX_GPIO_IRQENABLE1;
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mask = 0xffffffff;
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break;
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default:
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BUG();
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return 0;
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}
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return __raw_readl(reg);
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l = __raw_readl(reg);
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if (inv)
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l = ~l;
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l &= mask;
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return l;
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}
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static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
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