drm/radeon/kms: check for DP MST mode in a few more places (v2)
DP MST is DP multi-stream support, part of DP 1.2. v2: switch to a helper macro as suggested by Michel. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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3 changed files with 14 additions and 13 deletions
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@ -638,7 +638,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
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if (ss_enabled && ss->percentage)
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args.v3.sInput.ucDispPllConfig |=
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DISPPLL_CONFIG_SS_ENABLE;
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if (encoder_mode == ATOM_ENCODER_MODE_DP) {
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if (ENCODER_MODE_IS_DP(encoder_mode)) {
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args.v3.sInput.ucDispPllConfig |=
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DISPPLL_CONFIG_COHERENT_MODE;
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/* 16200 or 27000 */
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@ -930,6 +930,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
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bpc = connector->display_info.bpc;
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switch (encoder_mode) {
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case ATOM_ENCODER_MODE_DP_MST:
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case ATOM_ENCODER_MODE_DP:
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/* DP/eDP */
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dp_clock = dig_connector->dp_clock / 10;
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@ -1435,7 +1436,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
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* PPLL/DCPLL programming and only program the DP DTO for the
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* crtc virtual pixel clock.
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*/
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if (atombios_get_encoder_mode(test_encoder) == ATOM_ENCODER_MODE_DP) {
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if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {
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if (ASIC_IS_DCE5(rdev) || rdev->clock.dp_extclk)
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return ATOM_PPLL_INVALID;
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}
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@ -834,8 +834,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
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else
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args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
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if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
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(args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST))
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if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode))
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args.v1.ucLaneNum = dp_lane_count;
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else if (radeon_encoder->pixel_clock > 165000)
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args.v1.ucLaneNum = 8;
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@ -843,8 +842,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
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args.v1.ucLaneNum = 4;
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if (ASIC_IS_DCE5(rdev)) {
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if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
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(args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST)) {
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if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode)) {
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if (dp_clock == 270000)
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args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ;
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else if (dp_clock == 540000)
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@ -877,7 +875,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
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else
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args.v4.ucHPD_ID = hpd_id + 1;
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} else if (ASIC_IS_DCE4(rdev)) {
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if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) && (dp_clock == 270000))
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if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
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args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ;
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args.v3.acConfig.ucDigSel = dig->dig_encoder;
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switch (bpc) {
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@ -902,7 +900,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
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break;
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}
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} else {
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if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) && (dp_clock == 270000))
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if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
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args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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@ -977,7 +975,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
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if (dig_encoder == -1)
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return;
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if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP)
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if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)))
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is_dp = true;
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memset(&args, 0, sizeof(args));
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@ -1246,7 +1244,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder,
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args.v1.sDigEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
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args.v1.sDigEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder);
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if (args.v1.sDigEncoder.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
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if (ENCODER_MODE_IS_DP(args.v1.sDigEncoder.ucEncoderMode)) {
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if (dp_clock == 270000)
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args.v1.sDigEncoder.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
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args.v1.sDigEncoder.ucLaneNum = dp_lane_count;
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@ -1263,7 +1261,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder,
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args.v3.sExtEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
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args.v3.sExtEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder);
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if (args.v3.sExtEncoder.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
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if (ENCODER_MODE_IS_DP(args.v3.sExtEncoder.ucEncoderMode)) {
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if (dp_clock == 270000)
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args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ;
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else if (dp_clock == 540000)
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@ -1458,7 +1456,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
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atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
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else
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atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
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if ((atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) && connector) {
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if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
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if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
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atombios_set_edp_panel_power(connector,
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ATOM_TRANSMITTER_ACTION_POWER_ON);
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@ -1477,7 +1475,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
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case DRM_MODE_DPMS_SUSPEND:
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case DRM_MODE_DPMS_OFF:
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atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
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if ((atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) && connector) {
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if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
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if (ASIC_IS_DCE4(rdev))
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atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
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if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
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@ -459,6 +459,8 @@ struct radeon_framebuffer {
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struct drm_gem_object *obj;
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};
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#define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
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((em) == ATOM_ENCODER_MODE_DP_MST))
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extern enum radeon_tv_std
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radeon_combios_get_tv_info(struct radeon_device *rdev);
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