Fix endianity in A100U2W SCSI driver
Support big endian systems in a100u2w driver. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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63cf13b77a
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987ff954cd
1 changed files with 18 additions and 18 deletions
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@ -389,7 +389,7 @@ static u8 orc_load_firmware(struct orc_host * host)
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outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */
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data32_ptr = (u8 *) & data32;
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data32 = 0; /* Initial FW address to 0 */
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data32 = cpu_to_le32(0); /* Initial FW address to 0 */
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outw(0x0010, host->base + ORC_EBIOSADR0);
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*data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
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outw(0x0011, host->base + ORC_EBIOSADR0);
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@ -397,18 +397,18 @@ static u8 orc_load_firmware(struct orc_host * host)
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outw(0x0012, host->base + ORC_EBIOSADR0);
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*(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
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outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
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outl(data32, host->base + ORC_FWBASEADR); /* Write FW address */
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outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR); /* Write FW address */
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/* Copy the code from the BIOS to the SRAM */
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bios_addr = (u16) data32; /* FW code locate at BIOS address + ? */
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bios_addr = (u16) le32_to_cpu(data32); /* FW code locate at BIOS address + ? */
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for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */
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i < 0x1000; /* Firmware code size = 4K */
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i++, bios_addr++) {
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outw(bios_addr, host->base + ORC_EBIOSADR0);
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*data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
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if ((i % 4) == 3) {
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outl(data32, host->base + ORC_RISCRAM); /* Write every 4 bytes */
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outl(le32_to_cpu(data32), host->base + ORC_RISCRAM); /* Write every 4 bytes */
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data32_ptr = (u8 *) & data32;
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}
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}
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@ -423,7 +423,7 @@ static u8 orc_load_firmware(struct orc_host * host)
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outw(bios_addr, host->base + ORC_EBIOSADR0);
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*data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
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if ((i % 4) == 3) {
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if (inl(host->base + ORC_RISCRAM) != data32) {
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if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) {
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outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
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outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */
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return 0;
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@ -459,8 +459,8 @@ static void setup_SCBs(struct orc_host * host)
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for (i = 0; i < ORC_MAXQUEUE; i++) {
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escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
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scb->sg_addr = (u32) escb_phys;
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scb->sense_addr = (u32) escb_phys;
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scb->sg_addr = cpu_to_le32((u32) escb_phys);
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scb->sense_addr = cpu_to_le32((u32) escb_phys);
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scb->escb = escb;
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scb->scbidx = i;
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scb++;
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@ -642,8 +642,8 @@ static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsig
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scb->link = 0xFF;
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scb->reserved0 = 0;
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scb->reserved1 = 0;
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scb->xferlen = 0;
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scb->sg_len = 0;
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scb->xferlen = cpu_to_le32(0);
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scb->sg_len = cpu_to_le32(0);
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escb->srb = NULL;
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escb->srb = cmd;
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@ -858,9 +858,9 @@ static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, stru
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scb->lun = cmd->device->lun;
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scb->reserved0 = 0;
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scb->reserved1 = 0;
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scb->sg_len = 0;
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scb->sg_len = cpu_to_le32(0);
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scb->xferlen = (u32) scsi_bufflen(cmd);
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scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd));
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sgent = (struct orc_sgent *) & escb->sglist[0];
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count_sg = scsi_dma_map(cmd);
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@ -868,18 +868,18 @@ static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, stru
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/* Build the scatter gather lists */
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if (count_sg) {
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scb->sg_len = (u32) (count_sg * 8);
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scb->sg_len = cpu_to_le32((u32) (count_sg * 8));
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scsi_for_each_sg(cmd, sg, count_sg, i) {
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sgent->base = (u32) sg_dma_address(sg);
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sgent->length = (u32) sg_dma_len(sg);
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sgent->base = cpu_to_le32((u32) sg_dma_address(sg));
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sgent->length = cpu_to_le32((u32) sg_dma_len(sg));
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sgent++;
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}
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} else {
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scb->sg_len = 0;
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sgent->base = 0;
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sgent->length = 0;
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scb->sg_len = cpu_to_le32(0);
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sgent->base = cpu_to_le32(0);
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sgent->length = cpu_to_le32(0);
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}
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scb->sg_addr = (u32) scb->sense_addr;
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scb->sg_addr = (u32) scb->sense_addr; /* sense_addr is already little endian */
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scb->hastat = 0;
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scb->tastat = 0;
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scb->link = 0xFF;
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