dmaengine: PL08x: extract function to to generate cctl values
Extract the functionality from dma_slave_config to generate the cctl values for a given bus width and burst size. This allows us to use this elsewhere in the driver, namely the prepare functions. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 32 additions and 21 deletions
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@ -1207,14 +1207,40 @@ static u32 pl08x_burst(u32 maxburst)
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return burst_sizes[i].reg;
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}
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static u32 pl08x_get_cctl(struct pl08x_dma_chan *plchan,
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enum dma_slave_buswidth addr_width, u32 maxburst)
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{
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u32 width, burst, cctl = 0;
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width = pl08x_width(addr_width);
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if (width == ~0)
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return ~0;
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cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
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cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
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/*
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* If this channel will only request single transfers, set this
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* down to ONE element. Also select one element if no maxburst
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* is specified.
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*/
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if (plchan->cd->single)
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maxburst = 1;
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burst = pl08x_burst(maxburst);
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cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;
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cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
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return pl08x_cctl(cctl);
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}
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static int dma_set_runtime_config(struct dma_chan *chan,
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struct dma_slave_config *config)
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{
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struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
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struct pl08x_driver_data *pl08x = plchan->host;
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enum dma_slave_buswidth addr_width;
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u32 width, burst, maxburst;
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u32 cctl = 0;
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u32 maxburst, cctl = 0;
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if (!plchan->slave)
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return -EINVAL;
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@ -1233,8 +1259,8 @@ static int dma_set_runtime_config(struct dma_chan *chan,
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return -EINVAL;
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}
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width = pl08x_width(addr_width);
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if (width == ~0) {
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cctl = pl08x_get_cctl(plchan, addr_width, maxburst);
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if (cctl == ~0) {
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dev_err(&pl08x->adev->dev,
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"bad runtime_config: alien address width\n");
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return -EINVAL;
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@ -1242,25 +1268,10 @@ static int dma_set_runtime_config(struct dma_chan *chan,
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plchan->cfg = *config;
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cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
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cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
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/*
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* If this channel will only request single transfers, set this
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* down to ONE element. Also select one element if no maxburst
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* is specified.
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*/
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if (plchan->cd->single)
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maxburst = 1;
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burst = pl08x_burst(maxburst);
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cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;
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cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
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if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
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plchan->src_cctl = pl08x_cctl(cctl);
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plchan->src_cctl = cctl;
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} else {
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plchan->dst_cctl = pl08x_cctl(cctl);
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plchan->dst_cctl = cctl;
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}
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dev_dbg(&pl08x->adev->dev,
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