[ALSA] au88x0 - 64bit arch fixes
Modules: au88x0 driver Fix the driver codes to run on 64bit architectures. The patch taken from ALSA BTS bug#1047. Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai
Jaroslav Kysela
parent
7a6c8ff1ef
commit
97c67b65cb
11 changed files with 81 additions and 72 deletions
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@ -151,14 +151,18 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
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// check PCI availability (DMA).
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if ((err = pci_enable_device(pci)) < 0)
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return err;
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if (pci_set_dma_mask(pci, DMA_32BIT_MASK)) {
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if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
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pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
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printk(KERN_ERR "error to set DMA mask\n");
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pci_disable_device(pci);
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return -ENXIO;
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}
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chip = kzalloc(sizeof(*chip), GFP_KERNEL);
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if (chip == NULL)
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if (chip == NULL) {
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pci_disable_device(pci);
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return -ENOMEM;
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}
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chip->card = card;
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@ -208,6 +212,8 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
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goto alloc_out;
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}
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snd_card_set_dev(card, &pci->dev);
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*rchip = chip;
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return 0;
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@ -39,8 +39,8 @@
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#include "au88x0_wt.h"
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#endif
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#define hwread(x,y) readl((x)+((y)>>2))
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#define hwwrite(x,y,z) writel((z),(x)+((y)>>2))
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#define hwread(x,y) readl((x)+(y))
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#define hwwrite(x,y,z) writel((z),(x)+(y))
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/* Vortex MPU401 defines. */
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#define MIDI_CLOCK_DIV 0x61
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@ -113,7 +113,7 @@ typedef struct {
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//int this_08; /* Still unknown */
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int fifo_enabled; /* this_24 */
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int fifo_status; /* this_1c */
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int dma_ctrl; /* this_78 (ADB), this_7c (WT) */
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u32 dma_ctrl; /* this_78 (ADB), this_7c (WT) */
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int dma_unknown; /* this_74 (ADB), this_78 (WT). WDM: +8 */
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int cfg0;
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int cfg1;
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@ -178,7 +178,7 @@ struct snd_vortex {
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/* PCI hardware resources */
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unsigned long io;
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unsigned long __iomem *mmio;
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void __iomem *mmio;
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unsigned int irq;
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spinlock_t lock;
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@ -201,14 +201,14 @@ static void vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
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int count);
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static void vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie,
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int dir, int fmt, int d,
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unsigned long offset);
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u32 offset);
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static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb);
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#ifndef CHIP_AU8810
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static void vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
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struct snd_sg_buf * sgbuf, int size,
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int count);
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static void vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d, /*int e, */
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unsigned long offset);
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u32 offset);
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static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb);
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#endif
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@ -376,7 +376,7 @@ vortex_mixer_delWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
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static void vortex_mixer_init(vortex_t * vortex)
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{
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unsigned long addr;
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u32 addr;
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int x;
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// FIXME: get rid of this crap.
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@ -639,7 +639,7 @@ static void vortex_src_setupchannel(vortex_t * card, unsigned char src,
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static void vortex_srcblock_init(vortex_t * vortex)
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{
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unsigned long addr;
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u32 addr;
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int x;
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hwwrite(vortex->mmio, VORTEX_SRC_SOURCESIZE, 0x1ff);
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/*
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@ -1035,7 +1035,7 @@ vortex_fifo_setwtctrl(vortex_t * vortex, int fifo, int ctrl, int priority,
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static void vortex_fifo_init(vortex_t * vortex)
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{
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int x;
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unsigned long addr;
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u32 addr;
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/* ADB DMA channels fifos. */
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addr = VORTEX_FIFO_ADBCTRL + ((NR_ADB - 1) * 4);
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@ -1054,7 +1054,7 @@ static void vortex_fifo_init(vortex_t * vortex)
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hwwrite(vortex->mmio, addr, FIFO_U0);
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if (hwread(vortex->mmio, addr) != FIFO_U0)
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printk(KERN_ERR
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"bad wt fifo reset (0x%08lx, 0x%08x)!\n",
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"bad wt fifo reset (0x%08x, 0x%08x)!\n",
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addr, hwread(vortex->mmio, addr));
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vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE);
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addr -= 4;
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@ -1152,7 +1152,7 @@ vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
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static void
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vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie, int dir,
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int fmt, int d, unsigned long offset)
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int fmt, int d, u32 offset)
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{
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stream_t *dma = &vortex->dma_adb[adbdma];
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@ -1411,7 +1411,7 @@ vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
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static void
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vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d,
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/*int e, */ unsigned long offset)
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/*int e, */ u32 offset)
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{
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stream_t *dma = &vortex->dma_wt[wtdma];
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@ -377,23 +377,23 @@ static void vortex_EqHw_GetLevels(vortex_t * vortex, u16 a[])
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#endif
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/* Global Control */
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static void vortex_EqHw_SetControlReg(vortex_t * vortex, unsigned long reg)
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static void vortex_EqHw_SetControlReg(vortex_t * vortex, u32 reg)
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{
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hwwrite(vortex->mmio, 0x2b440, reg);
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}
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static void vortex_EqHw_SetSampleRate(vortex_t * vortex, int sr)
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static void vortex_EqHw_SetSampleRate(vortex_t * vortex, u32 sr)
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{
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hwwrite(vortex->mmio, 0x2b440, ((sr & 0x1f) << 3) | 0xb800);
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}
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#if 0
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static void vortex_EqHw_GetControlReg(vortex_t * vortex, unsigned long *reg)
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static void vortex_EqHw_GetControlReg(vortex_t * vortex, u32 *reg)
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{
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*reg = hwread(vortex->mmio, 0x2b440);
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}
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static void vortex_EqHw_GetSampleRate(vortex_t * vortex, int *sr)
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static void vortex_EqHw_GetSampleRate(vortex_t * vortex, u32 *sr)
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{
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*sr = (hwread(vortex->mmio, 0x2b440) >> 3) & 0x1f;
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}
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@ -554,7 +554,7 @@ static void vortex_Eqlzr_SetRightGain(vortex_t * vortex, u16 index, u16 gain)
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#if 0
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static int
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vortex_Eqlzr_GetAllBands(vortex_t * vortex, u16 * gains, unsigned long *cnt)
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vortex_Eqlzr_GetAllBands(vortex_t * vortex, u16 * gains, s32 *cnt)
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{
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eqlzr_t *eq = &(vortex->eq);
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int si = 0;
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@ -586,7 +586,7 @@ static int vortex_Eqlzr_SetAllBandsFromActiveCoeffSet(vortex_t * vortex)
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}
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static int
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vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], unsigned long count)
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vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], s32 count)
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{
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eqlzr_t *eq = &(vortex->eq);
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int i;
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@ -604,11 +604,10 @@ vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], unsigned long count)
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}
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static void
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vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, unsigned long a,
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unsigned long b)
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vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, u32 a, u32 b)
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{
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eqlzr_t *eq = &(vortex->eq);
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int eax, ebx;
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u32 eax, ebx;
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eq->this58 = a;
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eq->this5c = b;
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@ -624,7 +623,7 @@ vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, unsigned long a,
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static void vortex_Eqlzr_ProgramA3dBypassGain(vortex_t * vortex)
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{
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eqlzr_t *eq = &(vortex->eq);
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int eax, ebx;
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u32 eax, ebx;
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if (eq->this54)
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eax = eq->this0e;
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@ -641,7 +640,7 @@ static void vortex_Eqlzr_ShutDownA3d(vortex_t * vortex)
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vortex_EqHw_ZeroA3DIO(vortex);
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}
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static void vortex_Eqlzr_SetBypass(vortex_t * vortex, long bp)
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static void vortex_Eqlzr_SetBypass(vortex_t * vortex, u32 bp)
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{
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eqlzr_t *eq = &(vortex->eq);
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@ -651,8 +650,8 @@ static void vortex_Eqlzr_SetBypass(vortex_t * vortex, long bp)
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vortex_EqHw_SetBypassGain(vortex, eq->this08, eq->this08);
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} else {
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/* EQ disabled. */
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vortex_EqHw_SetLeftGainsTarget(vortex, (u16 *) (eq->this14));
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vortex_EqHw_SetRightGainsTarget(vortex, (u16 *) (eq->this14));
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vortex_EqHw_SetLeftGainsTarget(vortex, eq->this14_array);
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vortex_EqHw_SetRightGainsTarget(vortex, eq->this14_array);
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vortex_EqHw_SetBypassGain(vortex, eq->this0c, eq->this0c);
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}
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vortex_Eqlzr_ProgramA3dBypassGain(vortex);
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@ -706,7 +705,7 @@ static void vortex_Eqlzr_init(vortex_t * vortex)
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eq->this5c = 0xffff;
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/* Set gains. */
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memset(eq->this14, 0, 2 * 10);
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memset(eq->this14_array, 0, sizeof(eq->this14_array));
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/* Actual init. */
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vortex_EqHw_ZeroState(vortex);
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@ -792,7 +791,7 @@ snd_vortex_eq_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucon
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{
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vortex_t *vortex = snd_kcontrol_chip(kcontrol);
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int i = kcontrol->private_value;
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u16 gainL, gainR;
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u16 gainL = 0, gainR = 0;
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vortex_Eqlzr_GetLeftGain(vortex, i, &gainL);
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vortex_Eqlzr_GetRightGain(vortex, i, &gainR);
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@ -806,7 +805,7 @@ snd_vortex_eq_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucon
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{
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vortex_t *vortex = snd_kcontrol_chip(kcontrol);
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int changed = 0, i = kcontrol->private_value;
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u16 gainL, gainR;
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u16 gainL = 0, gainR = 0;
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vortex_Eqlzr_GetLeftGain(vortex, i, &gainL);
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vortex_Eqlzr_GetRightGain(vortex, i, &gainR);
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@ -18,26 +18,26 @@ typedef struct {
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} auxxEqCoeffSet_t;
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typedef struct {
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unsigned int *this00; /*CAsp4HwIO */
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long this04; /* How many filters for each side (default = 10) */
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long this08; /* inited to cero. Stereo flag? */
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u32 ptr_this00; /*CAsp4HwIO */
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s32 this04; /* How many filters for each side (default = 10) */
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s32 this08; /* inited to cero. Stereo flag? */
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} eqhw_t;
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typedef struct {
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unsigned int *this00; /*CAsp4Core */
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u32 ptr_this00; /*CAsp4Core */
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eqhw_t this04; /* CHwEq */
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short this08; /* Bad codec flag ? SetBypassGain: bypass gain */
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short this0a;
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short this0c; /* SetBypassGain: bypass gain when this28 is not set. */
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short this0e;
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u16 this08; /* Bad codec flag ? SetBypassGain: bypass gain */
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u16 this0a;
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u16 this0c; /* SetBypassGain: bypass gain when this28 is not set. */
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u16 this0e;
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long this10; /* How many gains are used for each side (right or left). */
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u16 this14[32]; /* SetLeftGainsTarget: Left (and right?) EQ gains */
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long this24;
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long this28; /* flag related to EQ enabled or not. Gang flag ? */
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long this54; /* SetBypass */
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long this58;
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long this5c;
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s32 this10; /* How many gains are used for each side (right or left). */
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u16 this14_array[32]; /* SetLeftGainsTarget: Left (and right?) EQ gains */
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s32 this24;
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s32 this28; /* flag related to EQ enabled or not. Gang flag ? */
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s32 this54; /* SetBypass */
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s32 this58;
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s32 this5c;
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/*0x60 */ auxxEqCoeffSet_t coefset;
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/* 50 u16 word each channel. */
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u16 this130[20]; /* Left and Right gains */
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@ -104,7 +104,11 @@ static u16 asEqOutStateZeros[48] = {
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};
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/*_rodataba0:*/
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static long eq_levels[32] = {
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static u16 eq_levels[64] = {
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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@ -95,7 +95,7 @@ static int __devinit snd_vortex_midi(vortex_t * vortex)
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return temp;
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}
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#else
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port = (unsigned long)(vortex->mmio + (VORTEX_MIDI_DATA >> 2));
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port = (unsigned long)(vortex->mmio + VORTEX_MIDI_DATA);
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if ((temp =
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snd_mpu401_uart_new(vortex->card, 0, MPU401_HW_AUREAL, port,
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1, 0, 0, &rmidi)) != 0) {
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@ -105,7 +105,7 @@ static int __devinit snd_vortex_midi(vortex_t * vortex)
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return temp;
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}
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mpu = rmidi->private_data;
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mpu->cport = (unsigned long)(vortex->mmio + (VORTEX_MIDI_CMD >> 2));
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mpu->cport = (unsigned long)(vortex->mmio + VORTEX_MIDI_CMD);
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#endif
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vortex->rmidi = rmidi;
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return 0;
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@ -32,7 +32,7 @@ static void vortex_connection_mixin_mix(vortex_t * vortex, int en,
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unsigned char mix, int a);
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static void vortex_fifo_wtinitialize(vortex_t * vortex, int fifo, int j);
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static int vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
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unsigned long val);
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u32 val);
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/* WT */
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@ -166,7 +166,7 @@ static int vortex_wt_GetReg(vortex_t * vortex, char reg, int wt)
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/* WT hardware abstraction layer generic register interface. */
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static int
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vortex_wt_SetReg2(vortex_t * vortex, unsigned char reg, int wt,
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unsigned short val)
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u16 val)
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{
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/*
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int eax, edx;
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@ -190,7 +190,7 @@ vortex_wt_SetReg2(vortex_t * vortex, unsigned char reg, int wt,
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#endif
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static int
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vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
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unsigned long val)
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u32 val)
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{
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int ecx;
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@ -279,7 +279,7 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
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static void vortex_wt_init(vortex_t * vortex)
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{
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int var4, var8, varc, var10 = 0, edi;
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u32 var4, var8, varc, var10 = 0, edi;
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var10 &= 0xFFFFFFE3;
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var10 |= 0x22;
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@ -353,7 +353,7 @@ static void vortex_wt_SetVolume(vortex_t * vortex, int wt, int vol[])
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static void vortex_wt_SetFrequency(vortex_t * vortex, int wt, unsigned int sr)
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{
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wt_voice_t *voice = &(vortex->wt_voice[wt]);
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long int eax, edx;
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u32 eax, edx;
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//FIXME: 64 bit operation.
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eax = ((sr << 0xf) * 0x57619F1) & 0xffffffff;
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@ -53,11 +53,11 @@ enum {
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#endif
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typedef struct {
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unsigned int parm0; /* this_1E4 */
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unsigned int parm1; /* this_1E8 */
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unsigned int parm2; /* this_1EC */
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unsigned int parm3; /* this_1F0 */
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unsigned int this_1D0;
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u32 parm0; /* this_1E4 */
|
||||
u32 parm1; /* this_1E8 */
|
||||
u32 parm2; /* this_1EC */
|
||||
u32 parm3; /* this_1F0 */
|
||||
u32 this_1D0;
|
||||
} wt_voice_t;
|
||||
|
||||
#endif /* _AU88X0_WT_H */
|
||||
|
|
|
|||
|
|
@ -562,7 +562,7 @@ static void
|
|||
vortex_XtalkHw_SetDelay(vortex_t * vortex, unsigned short right,
|
||||
unsigned short left)
|
||||
{
|
||||
int esp0 = 0;
|
||||
u32 esp0 = 0;
|
||||
|
||||
esp0 &= 0x1FFFFFFF;
|
||||
esp0 |= 0xA0000000;
|
||||
|
|
@ -632,18 +632,18 @@ static void vortex_XtalkHw_GetRightDline(vortex_t * vortex, xtalk_dline_t dline)
|
|||
/* Control/Global stuff */
|
||||
|
||||
#if 0
|
||||
static void vortex_XtalkHw_SetControlReg(vortex_t * vortex, unsigned long ctrl)
|
||||
static void vortex_XtalkHw_SetControlReg(vortex_t * vortex, u32 ctrl)
|
||||
{
|
||||
hwwrite(vortex->mmio, 0x24660, ctrl);
|
||||
}
|
||||
static void vortex_XtalkHw_GetControlReg(vortex_t * vortex, unsigned long *ctrl)
|
||||
static void vortex_XtalkHw_GetControlReg(vortex_t * vortex, u32 *ctrl)
|
||||
{
|
||||
*ctrl = hwread(vortex->mmio, 0x24660);
|
||||
}
|
||||
#endif
|
||||
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr)
|
||||
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, u32 sr)
|
||||
{
|
||||
int temp;
|
||||
u32 temp;
|
||||
|
||||
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
|
||||
temp = (temp & 0xffffff07) | ((sr & 0x1f) << 3);
|
||||
|
|
@ -651,7 +651,7 @@ static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr)
|
|||
}
|
||||
|
||||
#if 0
|
||||
static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, int *sr)
|
||||
static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, u32 *sr)
|
||||
{
|
||||
*sr = (hwread(vortex->mmio, 0x24660) >> 3) & 0x1f;
|
||||
}
|
||||
|
|
@ -659,7 +659,7 @@ static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, int *sr)
|
|||
#endif
|
||||
static void vortex_XtalkHw_Enable(vortex_t * vortex)
|
||||
{
|
||||
int temp;
|
||||
u32 temp;
|
||||
|
||||
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
|
||||
temp |= 1;
|
||||
|
|
@ -669,7 +669,7 @@ static void vortex_XtalkHw_Enable(vortex_t * vortex)
|
|||
|
||||
static void vortex_XtalkHw_Disable(vortex_t * vortex)
|
||||
{
|
||||
int temp;
|
||||
u32 temp;
|
||||
|
||||
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
|
||||
temp &= 0xfffffffe;
|
||||
|
|
|
|||
|
|
@ -39,16 +39,16 @@
|
|||
#define XT_SPEAKER1 3
|
||||
#define XT_DIAMOND 4
|
||||
|
||||
typedef long xtalk_dline_t[XTDLINE_SZ];
|
||||
typedef short xtalk_gains_t[XTGAINS_SZ];
|
||||
typedef short xtalk_instate_t[XTINST_SZ];
|
||||
typedef short xtalk_coefs_t[5][5];
|
||||
typedef short xtalk_state_t[5][4];
|
||||
typedef u32 xtalk_dline_t[XTDLINE_SZ];
|
||||
typedef u16 xtalk_gains_t[XTGAINS_SZ];
|
||||
typedef u16 xtalk_instate_t[XTINST_SZ];
|
||||
typedef u16 xtalk_coefs_t[5][5];
|
||||
typedef u16 xtalk_state_t[5][4];
|
||||
|
||||
static void vortex_XtalkHw_SetGains(vortex_t * vortex,
|
||||
xtalk_gains_t const gains);
|
||||
static void vortex_XtalkHw_SetGainsAllChan(vortex_t * vortex);
|
||||
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr);
|
||||
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, u32 sr);
|
||||
static void vortex_XtalkHw_ProgramPipe(vortex_t * vortex);
|
||||
static void vortex_XtalkHw_ProgramPipe(vortex_t * vortex);
|
||||
static void vortex_XtalkHw_ProgramXtalkWide(vortex_t * vortex);
|
||||
|
|
|
|||
Loading…
Reference in a new issue