[BNX2]: Add remote PHY bit definitions.
Add new fields in struct bnx2 and other bit definitions in shared memory to support remote PHY. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 50 additions and 1 deletions
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@ -6537,6 +6537,7 @@ struct bnx2 {
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#define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
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#define PHY_INT_MODE_LINK_READY_FLAG 0x200
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#define PHY_DIS_EARLY_DAC_FLAG 0x400
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#define REMOTE_PHY_CAP_FLAG 0x800
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u32 mii_bmcr;
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u32 mii_bmsr;
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@ -6625,6 +6626,7 @@ struct bnx2 {
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u16 req_line_speed;
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u8 req_duplex;
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u8 phy_port;
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u8 link_up;
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u16 line_speed;
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@ -6770,7 +6772,7 @@ struct fw_info {
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* the firmware has timed out, the driver will assume there is no firmware
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* running and there won't be any firmware-driver synchronization during a
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* driver reset. */
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#define FW_ACK_TIME_OUT_MS 100
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#define FW_ACK_TIME_OUT_MS 1000
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#define BNX2_DRV_RESET_SIGNATURE 0x00000000
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@ -6788,6 +6790,7 @@ struct fw_info {
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#define BNX2_DRV_MSG_CODE_DIAG 0x07000000
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#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
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#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000
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#define BNX2_DRV_MSG_CODE_CMD_SET_LINK 0x10000000
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#define BNX2_DRV_MSG_DATA 0x00ff0000
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#define BNX2_DRV_MSG_DATA_WAIT0 0x00010000
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@ -6845,6 +6848,30 @@ struct fw_info {
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* This is used for debugging. */
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#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE 0x00080000
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#define BNX2_DRV_MB_ARG0 0x00000014
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#define BNX2_NETLINK_SET_LINK_SPEED_10HALF (1<<0)
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#define BNX2_NETLINK_SET_LINK_SPEED_10FULL (1<<1)
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#define BNX2_NETLINK_SET_LINK_SPEED_10 \
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(BNX2_NETLINK_SET_LINK_SPEED_10HALF | \
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BNX2_NETLINK_SET_LINK_SPEED_10FULL)
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#define BNX2_NETLINK_SET_LINK_SPEED_100HALF (1<<2)
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#define BNX2_NETLINK_SET_LINK_SPEED_100FULL (1<<3)
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#define BNX2_NETLINK_SET_LINK_SPEED_100 \
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(BNX2_NETLINK_SET_LINK_SPEED_100HALF | \
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BNX2_NETLINK_SET_LINK_SPEED_100FULL)
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#define BNX2_NETLINK_SET_LINK_SPEED_1GHALF (1<<4)
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#define BNX2_NETLINK_SET_LINK_SPEED_1GFULL (1<<5)
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#define BNX2_NETLINK_SET_LINK_SPEED_2G5HALF (1<<6)
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#define BNX2_NETLINK_SET_LINK_SPEED_2G5FULL (1<<7)
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#define BNX2_NETLINK_SET_LINK_SPEED_10GHALF (1<<8)
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#define BNX2_NETLINK_SET_LINK_SPEED_10GFULL (1<<9)
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#define BNX2_NETLINK_SET_LINK_ENABLE_AUTONEG (1<<10)
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#define BNX2_NETLINK_SET_LINK_PHY_APP_REMOTE (1<<11)
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#define BNX2_NETLINK_SET_LINK_FC_SYM_PAUSE (1<<12)
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#define BNX2_NETLINK_SET_LINK_FC_ASYM_PAUSE (1<<13)
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#define BNX2_NETLINK_SET_LINK_ETH_AT_WIRESPEED (1<<14)
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#define BNX2_NETLINK_SET_LINK_PHY_RESET (1<<15)
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#define BNX2_DEV_INFO_SIGNATURE 0x00000020
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#define BNX2_DEV_INFO_SIGNATURE_MAGIC 0x44564900
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#define BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK 0xffffff00
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@ -7065,6 +7092,28 @@ struct fw_info {
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#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK 0xffff
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#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_INFINITE 0xffff
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#define BNX2_FW_EVT_CODE_MB 0x354
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#define BNX2_FW_EVT_CODE_SW_TIMER_EXPIRATION_EVENT 0x00000000
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#define BNX2_FW_EVT_CODE_LINK_EVENT 0x00000001
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#define BNX2_DRV_ACK_CAP_MB 0x364
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#define BNX2_DRV_ACK_CAP_SIGNATURE 0x35450000
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#define BNX2_CAPABILITY_SIGNATURE_MASK 0xFFFF0000
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#define BNX2_FW_CAP_MB 0x368
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#define BNX2_FW_CAP_SIGNATURE 0xaa550000
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#define BNX2_FW_ACK_DRV_SIGNATURE 0x52500000
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#define BNX2_FW_CAP_SIGNATURE_MASK 0xffff0000
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#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE 0x00000001
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#define BNX2_FW_CAP_REMOTE_PHY_PRESENT 0x00000002
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#define BNX2_RPHY_SIGNATURE 0x36c
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#define BNX2_RPHY_LOAD_SIGNATURE 0x5a5a5a5a
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#define BNX2_RPHY_FLAGS 0x370
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#define BNX2_RPHY_SERDES_LINK 0x374
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#define BNX2_RPHY_COPPER_LINK 0x378
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#define HOST_VIEW_SHMEM_BASE 0x167c00
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#endif
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