Merge branch 'sfc-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/bwh/sfc
Ben Hutchings says: ==================== Some more fixes for EF10 support; hopefully the last lot: 1. Fixes for reading statistics, from Edward Cree and Jon Cooper. 2. Addition of ethtool statistics for packets dropped by the hardware before they were associated with a specific function, from Edward Cree. 3. Only bind to functions that are in control of their associated port, as the driver currently assumes this is the case. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
9684d7b0da
5 changed files with 149 additions and 29 deletions
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@ -444,6 +444,18 @@ static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
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EF10_DMA_STAT(rx_align_error, RX_ALIGN_ERROR_PKTS),
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EF10_DMA_STAT(rx_length_error, RX_LENGTH_ERROR_PKTS),
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EF10_DMA_STAT(rx_nodesc_drops, RX_NODESC_DROPS),
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EF10_DMA_STAT(rx_pm_trunc_bb_overflow, PM_TRUNC_BB_OVERFLOW),
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EF10_DMA_STAT(rx_pm_discard_bb_overflow, PM_DISCARD_BB_OVERFLOW),
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EF10_DMA_STAT(rx_pm_trunc_vfifo_full, PM_TRUNC_VFIFO_FULL),
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EF10_DMA_STAT(rx_pm_discard_vfifo_full, PM_DISCARD_VFIFO_FULL),
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EF10_DMA_STAT(rx_pm_trunc_qbb, PM_TRUNC_QBB),
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EF10_DMA_STAT(rx_pm_discard_qbb, PM_DISCARD_QBB),
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EF10_DMA_STAT(rx_pm_discard_mapping, PM_DISCARD_MAPPING),
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EF10_DMA_STAT(rx_dp_q_disabled_packets, RXDP_Q_DISABLED_PKTS),
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EF10_DMA_STAT(rx_dp_di_dropped_packets, RXDP_DI_DROPPED_PKTS),
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EF10_DMA_STAT(rx_dp_streaming_packets, RXDP_STREAMING_PKTS),
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EF10_DMA_STAT(rx_dp_emerg_fetch, RXDP_EMERGENCY_FETCH_CONDITIONS),
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EF10_DMA_STAT(rx_dp_emerg_wait, RXDP_EMERGENCY_WAIT_CONDITIONS),
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};
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#define HUNT_COMMON_STAT_MASK ((1ULL << EF10_STAT_tx_bytes) | \
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@ -498,44 +510,72 @@ static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
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#define HUNT_40G_EXTRA_STAT_MASK ((1ULL << EF10_STAT_rx_align_error) | \
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(1ULL << EF10_STAT_rx_length_error))
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#if BITS_PER_LONG == 64
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#define STAT_MASK_BITMAP(bits) (bits)
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#else
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#define STAT_MASK_BITMAP(bits) (bits) & 0xffffffff, (bits) >> 32
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#endif
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/* These statistics are only provided if the firmware supports the
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* capability PM_AND_RXDP_COUNTERS.
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*/
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#define HUNT_PM_AND_RXDP_STAT_MASK ( \
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(1ULL << EF10_STAT_rx_pm_trunc_bb_overflow) | \
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(1ULL << EF10_STAT_rx_pm_discard_bb_overflow) | \
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(1ULL << EF10_STAT_rx_pm_trunc_vfifo_full) | \
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(1ULL << EF10_STAT_rx_pm_discard_vfifo_full) | \
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(1ULL << EF10_STAT_rx_pm_trunc_qbb) | \
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(1ULL << EF10_STAT_rx_pm_discard_qbb) | \
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(1ULL << EF10_STAT_rx_pm_discard_mapping) | \
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(1ULL << EF10_STAT_rx_dp_q_disabled_packets) | \
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(1ULL << EF10_STAT_rx_dp_di_dropped_packets) | \
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(1ULL << EF10_STAT_rx_dp_streaming_packets) | \
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(1ULL << EF10_STAT_rx_dp_emerg_fetch) | \
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(1ULL << EF10_STAT_rx_dp_emerg_wait))
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static const unsigned long *efx_ef10_stat_mask(struct efx_nic *efx)
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static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx)
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{
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static const unsigned long hunt_40g_stat_mask[] = {
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STAT_MASK_BITMAP(HUNT_COMMON_STAT_MASK |
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HUNT_40G_EXTRA_STAT_MASK)
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};
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static const unsigned long hunt_10g_only_stat_mask[] = {
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STAT_MASK_BITMAP(HUNT_COMMON_STAT_MASK |
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HUNT_10G_ONLY_STAT_MASK)
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};
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u64 raw_mask = HUNT_COMMON_STAT_MASK;
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u32 port_caps = efx_mcdi_phy_get_caps(efx);
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struct efx_ef10_nic_data *nic_data = efx->nic_data;
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if (port_caps & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
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return hunt_40g_stat_mask;
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raw_mask |= HUNT_40G_EXTRA_STAT_MASK;
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else
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return hunt_10g_only_stat_mask;
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raw_mask |= HUNT_10G_ONLY_STAT_MASK;
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if (nic_data->datapath_caps &
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(1 << MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_LBN))
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raw_mask |= HUNT_PM_AND_RXDP_STAT_MASK;
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return raw_mask;
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}
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static void efx_ef10_get_stat_mask(struct efx_nic *efx, unsigned long *mask)
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{
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u64 raw_mask = efx_ef10_raw_stat_mask(efx);
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#if BITS_PER_LONG == 64
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mask[0] = raw_mask;
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#else
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mask[0] = raw_mask & 0xffffffff;
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mask[1] = raw_mask >> 32;
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#endif
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}
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static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names)
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{
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DECLARE_BITMAP(mask, EF10_STAT_COUNT);
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efx_ef10_get_stat_mask(efx, mask);
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return efx_nic_describe_stats(efx_ef10_stat_desc, EF10_STAT_COUNT,
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efx_ef10_stat_mask(efx), names);
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mask, names);
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}
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static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
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{
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struct efx_ef10_nic_data *nic_data = efx->nic_data;
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const unsigned long *stats_mask = efx_ef10_stat_mask(efx);
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DECLARE_BITMAP(mask, EF10_STAT_COUNT);
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__le64 generation_start, generation_end;
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u64 *stats = nic_data->stats;
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__le64 *dma_stats;
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efx_ef10_get_stat_mask(efx, mask);
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dma_stats = efx->stats_buffer.addr;
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nic_data = efx->nic_data;
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@ -543,8 +583,9 @@ static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
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if (generation_end == EFX_MC_STATS_GENERATION_INVALID)
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return 0;
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rmb();
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efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT, stats_mask,
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efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT, mask,
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stats, efx->stats_buffer.addr, false);
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rmb();
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generation_start = dma_stats[MC_CMD_MAC_GENERATION_START];
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if (generation_end != generation_start)
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return -EAGAIN;
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@ -563,12 +604,14 @@ static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
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static size_t efx_ef10_update_stats(struct efx_nic *efx, u64 *full_stats,
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struct rtnl_link_stats64 *core_stats)
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{
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const unsigned long *mask = efx_ef10_stat_mask(efx);
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DECLARE_BITMAP(mask, EF10_STAT_COUNT);
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struct efx_ef10_nic_data *nic_data = efx->nic_data;
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u64 *stats = nic_data->stats;
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size_t stats_count = 0, index;
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int retry;
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efx_ef10_get_stat_mask(efx, mask);
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/* If we're unlucky enough to read statistics during the DMA, wait
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* up to 10ms for it to finish (typically takes <500us)
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*/
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@ -963,7 +963,7 @@ static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
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bool *was_attached)
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{
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MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
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MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_OUT_LEN);
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MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
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size_t outlen;
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int rc;
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@ -981,6 +981,22 @@ static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
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goto fail;
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}
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/* We currently assume we have control of the external link
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* and are completely trusted by firmware. Abort probing
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* if that's not true for this function.
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*/
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if (driver_operating &&
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outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN &&
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(MCDI_DWORD(outbuf, DRV_ATTACH_EXT_OUT_FUNC_FLAGS) &
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(1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
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1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
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(1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
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1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
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netif_err(efx, probe, efx->net_dev,
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"This driver version only supports one function per port\n");
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return -ENODEV;
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}
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if (was_attached != NULL)
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*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
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return 0;
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@ -2574,8 +2574,58 @@
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#define MC_CMD_MAC_RX_LANES01_DISP_ERR 0x39 /* enum */
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#define MC_CMD_MAC_RX_LANES23_DISP_ERR 0x3a /* enum */
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#define MC_CMD_MAC_RX_MATCH_FAULT 0x3b /* enum */
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#define MC_CMD_GMAC_DMABUF_START 0x40 /* enum */
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#define MC_CMD_GMAC_DMABUF_END 0x5f /* enum */
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/* enum: PM trunc_bb_overflow counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW 0x3c
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/* enum: PM discard_bb_overflow counter. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW 0x3d
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/* enum: PM trunc_vfifo_full counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_VFIFO_FULL 0x3e
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/* enum: PM discard_vfifo_full counter. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_VFIFO_FULL 0x3f
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/* enum: PM trunc_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_QBB 0x40
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/* enum: PM discard_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_QBB 0x41
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/* enum: PM discard_mapping counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_MAPPING 0x42
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/* enum: RXDP counter: Number of packets dropped due to the queue being
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* disabled. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_Q_DISABLED_PKTS 0x43
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/* enum: RXDP counter: Number of packets dropped by the DICPU. Valid for EF10
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* with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_DI_DROPPED_PKTS 0x45
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/* enum: RXDP counter: Number of non-host packets. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_STREAMING_PKTS 0x46
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/* enum: RXDP counter: Number of times an emergency descriptor fetch was
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* performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_EMERGENCY_FETCH_CONDITIONS 0x47
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/* enum: RXDP counter: Number of times the DPCPU waited for an existing
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* descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_EMERGENCY_WAIT_CONDITIONS 0x48
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/* enum: Start of GMAC stats buffer space, for Siena only. */
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#define MC_CMD_GMAC_DMABUF_START 0x40
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/* enum: End of GMAC stats buffer space, for Siena only. */
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#define MC_CMD_GMAC_DMABUF_END 0x5f
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#define MC_CMD_MAC_GENERATION_END 0x60 /* enum */
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#define MC_CMD_MAC_NSTATS 0x61 /* enum */
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@ -5065,6 +5115,8 @@
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_WIDTH 1
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#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_LBN 26
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#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_WIDTH 1
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#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_LBN 27
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#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
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/* RxDPCPU firmware id. */
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST 4
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_LEN 2
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@ -469,8 +469,7 @@ size_t efx_nic_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,
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* @count: Length of the @desc array
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* @mask: Bitmask of which elements of @desc are enabled
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* @stats: Buffer to update with the converted statistics. The length
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* of this array must be at least the number of set bits in the
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* first @count bits of @mask.
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* of this array must be at least @count.
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* @dma_buf: DMA buffer containing hardware statistics
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* @accumulate: If set, the converted values will be added rather than
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* directly stored to the corresponding elements of @stats
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@ -503,11 +502,9 @@ void efx_nic_update_stats(const struct efx_hw_stat_desc *desc, size_t count,
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}
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if (accumulate)
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*stats += val;
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stats[index] += val;
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else
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*stats = val;
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stats[index] = val;
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}
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++stats;
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}
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}
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@ -386,6 +386,18 @@ enum {
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EF10_STAT_rx_align_error,
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EF10_STAT_rx_length_error,
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EF10_STAT_rx_nodesc_drops,
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EF10_STAT_rx_pm_trunc_bb_overflow,
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EF10_STAT_rx_pm_discard_bb_overflow,
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EF10_STAT_rx_pm_trunc_vfifo_full,
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EF10_STAT_rx_pm_discard_vfifo_full,
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EF10_STAT_rx_pm_trunc_qbb,
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EF10_STAT_rx_pm_discard_qbb,
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EF10_STAT_rx_pm_discard_mapping,
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EF10_STAT_rx_dp_q_disabled_packets,
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EF10_STAT_rx_dp_di_dropped_packets,
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EF10_STAT_rx_dp_streaming_packets,
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EF10_STAT_rx_dp_emerg_fetch,
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EF10_STAT_rx_dp_emerg_wait,
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EF10_STAT_COUNT
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};
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