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clk: tegra: fix enum tegra114_clk to match binding

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A gap exists in the binding's clock ID definitions. Fix the clock driver
to be consistent. This allows pclk to be looked up through device tree
and prevents:

ERROR: could not get clock /pmc:pclk(0)

Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Stephen Warren 2013-04-04 17:13:54 -06:00
parent c604283f52
commit 964ea47572
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/tegra/clk-tegra114.c
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@ -760,7 +760,7 @@ enum tegra114_clk {
pll_re_vco, pll_re_out, pll_e_out0, spdif_in_sync, i2s0_sync,
i2s1_sync, i2s2_sync, i2s3_sync, i2s4_sync, vimclk_sync, audio0,
audio1, audio2, audio3, audio4, spdif, clk_out_1, clk_out_2, clk_out_3,
blink, xusb_host_src, xusb_falcon_src, xusb_fs_src, xusb_ss_src,
blink, xusb_host_src = 252, xusb_falcon_src, xusb_fs_src, xusb_ss_src,
xusb_dev_src, xusb_dev, xusb_hs_src, sclk, hclk, pclk, cclk_g, cclk_lp,
/* Mux clocks */