x86: don't use P6_NOPs if compiling with CONFIG_X86_GENERIC
P6_NOPs are definitely not supported on some VIA CPUs, and possibly (unverified) on AMD K7s. It is also the only thing that prevents a 686 kernel from running on Transmeta TM3x00/5x00 (Crusoe) series. The performance benefit over generic NOPs is very small, so when building for generic consumption, avoid using them. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -377,9 +377,18 @@ config X86_OOSTORE
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def_bool y
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depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
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#
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# P6_NOPs are a relatively minor optimization that require a family >=
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# 6 processor, except that it is broken on certain VIA chips.
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# Furthermore, AMD chips prefer a totally different sequence of NOPs
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# (which work on all CPUs). As a result, disallow these if we're
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# compiling X86_GENERIC but not X86_64 (these NOPs do work on all
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# x86-64 capable chips); the list of processors in the right-hand clause
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# are the cores that benefit from this optimization.
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#
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config X86_P6_NOP
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def_bool y
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depends on (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || PENTIUM4)
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depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || PENTIUM4)
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config X86_TSC
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def_bool y
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