ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entries
It is easy to mis-maintain the proc_types table such that the entries become wrongly-sized and misaligned when the kernel is built in Thumb-2. This patch adds an assembly-time check which will turn most common size/alignment mistakes in this table into build failures, to avoid having to debug the boot-time kernel hang which would happen if the resulting kernel were actually booted. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 13 additions and 1 deletions
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@ -597,6 +597,8 @@ __common_mmu_cache_on:
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sub pc, lr, r0, lsr #32 @ properly flush pipeline
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#endif
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#define PROC_ENTRY_SIZE (4*5)
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/*
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* Here follow the relocatable cache support functions for the
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* various processors. This is a generic hook for locating an
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@ -624,7 +626,7 @@ call_cache_fn: adr r12, proc_types
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ARM( addeq pc, r12, r3 ) @ call cache function
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THUMB( addeq r12, r3 )
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THUMB( moveq pc, r12 ) @ call cache function
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add r12, r12, #4*5
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add r12, r12, #PROC_ENTRY_SIZE
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b 1b
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/*
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@ -794,6 +796,16 @@ proc_types:
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.size proc_types, . - proc_types
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/*
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* If you get a "non-constant expression in ".if" statement"
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* error from the assembler on this line, check that you have
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* not accidentally written a "b" instruction where you should
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* have written W(b).
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*/
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.if (. - proc_types) % PROC_ENTRY_SIZE != 0
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.error "The size of one or more proc_types entries is wrong."
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.endif
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/*
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* Turn off the Cache and MMU. ARMv3 does not support
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* reading the control register, but ARMv4 does.
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