[MTD] replace MTD_RAM with MTD_GENERIC_TYPE
Ram devices get the extra capability of MTD_NO_ERASE - not requiring an explicit erase before writing to it. Currently only mtdblock uses this capability. Rest of the patch is a simple text replacement. Signed-off-by: Joern Engel <joern@wh.fh-wedel.de>
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e369d62e92
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92cbfdcc36
9 changed files with 10 additions and 10 deletions
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@ -64,7 +64,7 @@ static struct mtd_info *map_ram_probe(struct map_info *map)
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map->fldrv = &mapram_chipdrv;
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map->fldrv = &mapram_chipdrv;
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mtd->priv = map;
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mtd->priv = map;
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mtd->name = map->name;
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mtd->name = map->name;
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mtd->type = MTD_RAM;
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mtd->type = MTD_GENERIC_TYPE;
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mtd->size = map->size;
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mtd->size = map->size;
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mtd->erase = mapram_erase;
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mtd->erase = mapram_erase;
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mtd->read = mapram_read;
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mtd->read = mapram_read;
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@ -324,7 +324,7 @@ static struct block2mtd_dev *add_device(char *devname, int erase_size)
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dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
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dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
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dev->mtd.erasesize = erase_size;
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dev->mtd.erasesize = erase_size;
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dev->mtd.type = MTD_RAM;
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dev->mtd.type = MTD_GENERIC_TYPE;
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dev->mtd.flags = MTD_CAP_RAM;
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dev->mtd.flags = MTD_CAP_RAM;
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dev->mtd.erase = block2mtd_erase;
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dev->mtd.erase = block2mtd_erase;
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dev->mtd.write = block2mtd_write;
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dev->mtd.write = block2mtd_write;
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@ -218,7 +218,7 @@ static int __init ms02nv_init_one(ulong addr)
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fixsize = (size - (fixaddr - addr)) & ~(PAGE_SIZE - 1);
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fixsize = (size - (fixaddr - addr)) & ~(PAGE_SIZE - 1);
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mp->uaddr = phys_to_virt(fixaddr);
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mp->uaddr = phys_to_virt(fixaddr);
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mtd->type = MTD_RAM;
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mtd->type = MTD_GENERIC_TYPE;
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mtd->flags = MTD_CAP_RAM;
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mtd->flags = MTD_CAP_RAM;
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mtd->size = fixsize;
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mtd->size = fixsize;
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mtd->name = (char *)ms02nv_name;
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mtd->name = (char *)ms02nv_name;
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@ -103,7 +103,7 @@ int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
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/* Setup the MTD structure */
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/* Setup the MTD structure */
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mtd->name = name;
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mtd->name = name;
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mtd->type = MTD_RAM;
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mtd->type = MTD_GENERIC_TYPE;
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mtd->flags = MTD_CAP_RAM;
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mtd->flags = MTD_CAP_RAM;
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mtd->size = size;
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mtd->size = size;
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mtd->erasesize = MTDRAM_ERASE_SIZE;
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mtd->erasesize = MTDRAM_ERASE_SIZE;
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@ -149,7 +149,7 @@ static int register_device(char *name, unsigned long start, unsigned long len)
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new->mtd.read = phram_read;
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new->mtd.read = phram_read;
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new->mtd.write = phram_write;
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new->mtd.write = phram_write;
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new->mtd.owner = THIS_MODULE;
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new->mtd.owner = THIS_MODULE;
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new->mtd.type = MTD_RAM;
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new->mtd.type = MTD_GENERIC_TYPE;
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new->mtd.erasesize = PAGE_SIZE;
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new->mtd.erasesize = PAGE_SIZE;
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ret = -EAGAIN;
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ret = -EAGAIN;
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@ -775,7 +775,7 @@ static int __init init_pmc551(void)
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mtd->write = pmc551_write;
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mtd->write = pmc551_write;
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mtd->point = pmc551_point;
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mtd->point = pmc551_point;
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mtd->unpoint = pmc551_unpoint;
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mtd->unpoint = pmc551_unpoint;
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mtd->type = MTD_RAM;
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mtd->type = MTD_GENERIC_TYPE;
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mtd->name = "PMC551 RAM board";
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mtd->name = "PMC551 RAM board";
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mtd->erasesize = 0x10000;
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mtd->erasesize = 0x10000;
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mtd->owner = THIS_MODULE;
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mtd->owner = THIS_MODULE;
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@ -207,7 +207,7 @@ static int register_device(char *name, unsigned long start, unsigned long length
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(*curmtd)->mtdinfo->read = slram_read;
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(*curmtd)->mtdinfo->read = slram_read;
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(*curmtd)->mtdinfo->write = slram_write;
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(*curmtd)->mtdinfo->write = slram_write;
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(*curmtd)->mtdinfo->owner = THIS_MODULE;
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(*curmtd)->mtdinfo->owner = THIS_MODULE;
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(*curmtd)->mtdinfo->type = MTD_RAM;
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(*curmtd)->mtdinfo->type = MTD_GENERIC_TYPE;
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(*curmtd)->mtdinfo->erasesize = SLRAM_BLK_SZ;
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(*curmtd)->mtdinfo->erasesize = SLRAM_BLK_SZ;
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if (add_mtd_device((*curmtd)->mtdinfo)) {
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if (add_mtd_device((*curmtd)->mtdinfo)) {
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@ -289,7 +289,7 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
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mutex_init(&mtdblk->cache_mutex);
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mutex_init(&mtdblk->cache_mutex);
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mtdblk->cache_state = STATE_EMPTY;
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mtdblk->cache_state = STATE_EMPTY;
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if (mtdblk->mtd->type != MTD_RAM && mtdblk->mtd->erasesize) {
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if ( !(mtdblk->mtd->flags & MTD_NO_ERASE) && mtdblk->mtd->erasesize) {
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mtdblk->cache_size = mtdblk->mtd->erasesize;
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mtdblk->cache_size = mtdblk->mtd->erasesize;
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mtdblk->cache_data = NULL;
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mtdblk->cache_data = NULL;
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}
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}
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@ -24,7 +24,6 @@ struct mtd_oob_buf {
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};
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};
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#define MTD_ABSENT 0
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#define MTD_ABSENT 0
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#define MTD_RAM 1
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#define MTD_NORFLASH 3
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#define MTD_NORFLASH 3
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#define MTD_NANDFLASH 4
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#define MTD_NANDFLASH 4
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#define MTD_DATAFLASH 6
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#define MTD_DATAFLASH 6
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@ -32,10 +31,11 @@ struct mtd_oob_buf {
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#define MTD_WRITEABLE 0x400 /* Device is writeable */
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#define MTD_WRITEABLE 0x400 /* Device is writeable */
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#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */
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#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */
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#define MTD_NO_ERASE 0x1000 /* No erase necessary */
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// Some common devices / combinations of capabilities
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// Some common devices / combinations of capabilities
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#define MTD_CAP_ROM 0
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#define MTD_CAP_ROM 0
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#define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
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#define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
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#define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
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#define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
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#define MTD_CAP_NANDFLASH (MTD_WRITEABLE)
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#define MTD_CAP_NANDFLASH (MTD_WRITEABLE)
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