Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL

Browse source 
According to OMAP4 TRM Table 3-1183, CM_CLKSEL_DPLL_USB register defines
following fields for multiplication and division factors:

DPLL_MULT (bits 19:8) DPLL multiplier factor (2 to 4095)
DPLL_DIV (bits 7:0) DPLL divider factor (0 to 255)

Acked-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Ameya Palande 2012-04-04 10:19:31 -06:00 committed by Paul Walmsley
parent 59269b9448
commit 91a290c457
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/mach-omap2/clock44xx_data.c
View file

@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
.modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
.autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB, .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB,
.idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB, .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB,
.mult_mask = OMAP4430_DPLL_MULT_MASK, .mult_mask = OMAP4430_DPLL_MULT_USB_MASK,
.div1_mask = OMAP4430_DPLL_DIV_MASK, .div1_mask = OMAP4430_DPLL_DIV_0_7_MASK,
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,