drm/i915: Thread the pipelining ring through the callers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
576ae4b8e4
commit
919926aeb3
4 changed files with 18 additions and 20 deletions
drivers/gpu/drm/i915
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@ -1133,7 +1133,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
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int i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
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int write);
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int i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
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bool pipelined);
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struct intel_ring_buffer *pipelined);
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int i915_gem_attach_phys_object(struct drm_device *dev,
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struct drm_i915_gem_object *obj,
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int id,
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@ -42,11 +42,11 @@ struct change_domains {
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};
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static int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
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bool pipelined);
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struct intel_ring_buffer *pipelined);
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static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
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static int i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj,
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int write);
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bool write);
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static int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,
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uint64_t offset,
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uint64_t size);
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@ -1274,12 +1274,10 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
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mutex_lock(&dev->struct_mutex);
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BUG_ON(obj->pin_count && !obj->pin_mappable);
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if (obj->gtt_space) {
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if (!obj->map_and_fenceable) {
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ret = i915_gem_object_unbind(obj);
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if (ret)
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goto unlock;
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}
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if (!obj->map_and_fenceable) {
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ret = i915_gem_object_unbind(obj);
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if (ret)
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goto unlock;
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}
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if (!obj->gtt_space) {
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@ -2637,7 +2635,7 @@ i915_gem_object_put_fence_reg(struct drm_i915_gem_object *obj,
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if (reg->gpu) {
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int ret;
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ret = i915_gem_object_flush_gpu_write_domain(obj, true);
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ret = i915_gem_object_flush_gpu_write_domain(obj, NULL);
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if (ret)
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return ret;
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@ -2817,7 +2815,7 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj)
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/** Flushes any GPU write domain for the object if it's dirty. */
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static int
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i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
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bool pipelined)
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struct intel_ring_buffer *pipelined)
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{
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struct drm_device *dev = obj->base.dev;
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@ -2828,7 +2826,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
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i915_gem_flush_ring(dev, obj->ring, 0, obj->base.write_domain);
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BUG_ON(obj->base.write_domain);
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if (pipelined)
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if (pipelined && pipelined == obj->ring)
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return 0;
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return i915_gem_object_wait_rendering(obj, true);
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@ -2892,7 +2890,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, int write)
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if (obj->gtt_space == NULL)
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return -EINVAL;
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ret = i915_gem_object_flush_gpu_write_domain(obj, false);
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ret = i915_gem_object_flush_gpu_write_domain(obj, NULL);
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if (ret != 0)
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return ret;
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@ -2931,7 +2929,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, int write)
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*/
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int
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i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
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bool pipelined)
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struct intel_ring_buffer *pipelined)
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{
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uint32_t old_read_domains;
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int ret;
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@ -2940,7 +2938,7 @@ i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
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if (obj->gtt_space == NULL)
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return -EINVAL;
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ret = i915_gem_object_flush_gpu_write_domain(obj, true);
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ret = i915_gem_object_flush_gpu_write_domain(obj, pipelined);
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if (ret)
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return ret;
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@ -2984,7 +2982,7 @@ i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj,
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* flushes to occur.
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*/
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static int
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i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, int write)
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i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
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{
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uint32_t old_write_domain, old_read_domains;
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int ret;
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@ -1434,7 +1434,7 @@ static void intel_update_fbc(struct drm_device *dev)
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int
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intel_pin_and_fence_fb_obj(struct drm_device *dev,
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struct drm_i915_gem_object *obj,
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bool pipelined)
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struct intel_ring_buffer *pipelined)
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{
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u32 alignment;
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int ret;
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@ -1594,7 +1594,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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mutex_lock(&dev->struct_mutex);
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ret = intel_pin_and_fence_fb_obj(dev,
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to_intel_framebuffer(crtc->fb)->obj,
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false);
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NULL);
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if (ret != 0) {
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mutex_unlock(&dev->struct_mutex);
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return ret;
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@ -5092,7 +5092,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
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obj = intel_fb->obj;
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mutex_lock(&dev->struct_mutex);
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ret = intel_pin_and_fence_fb_obj(dev, obj, true);
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ret = intel_pin_and_fence_fb_obj(dev, obj, &dev_priv->render_ring);
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if (ret)
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goto cleanup_work;
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@ -301,7 +301,7 @@ extern void intel_init_emon(struct drm_device *dev);
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extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
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struct drm_i915_gem_object *obj,
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bool pipelined);
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struct intel_ring_buffer *pipelined);
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extern int intel_framebuffer_init(struct drm_device *dev,
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struct intel_framebuffer *ifb,
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