[ARM] 4554/1: replace consistent_sync() with flush_ioremap_region()
This fixes a regression from around 2.6.18, consistent_sync() will now BUG() under these circumstances. The use of consistent_sync() was a hack, replacing it's usage here with a new function, flush_ioremap_region(). Signed-off-by: Jared Hulbert <jaredeh@gmail.com> Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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3 changed files with 11 additions and 7 deletions
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@ -15,9 +15,7 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/dma-mapping.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/partitions.h>
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@ -26,7 +24,7 @@
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#include <asm/hardware.h>
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#include <asm/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/lubbock.h>
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#include <asm/arch/lubbock.h>
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#include <asm/cacheflush.h>
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#define ROM_ADDR 0x00000000
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#define ROM_ADDR 0x00000000
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#define FLASH_ADDR 0x04000000
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#define FLASH_ADDR 0x04000000
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@ -35,7 +33,7 @@
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static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len)
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static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len)
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{
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{
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consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
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flush_ioremap_region(map->phys, map->cached, from, len);
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}
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}
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static struct map_info lubbock_maps[2] = { {
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static struct map_info lubbock_maps[2] = { {
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@ -15,8 +15,6 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/map.h>
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@ -26,6 +24,7 @@
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#include <asm/hardware.h>
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#include <asm/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/mainstone.h>
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#include <asm/arch/mainstone.h>
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#include <asm/cacheflush.h>
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#define ROM_ADDR 0x00000000
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#define ROM_ADDR 0x00000000
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@ -36,7 +35,7 @@
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static void mainstone_map_inval_cache(struct map_info *map, unsigned long from,
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static void mainstone_map_inval_cache(struct map_info *map, unsigned long from,
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ssize_t len)
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ssize_t len)
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{
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{
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consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
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flush_ioremap_region(map->phys, map->cached, from, len);
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}
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}
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static struct map_info mainstone_maps[2] = { {
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static struct map_info mainstone_maps[2] = { {
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@ -426,6 +426,13 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
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*/
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*/
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#define flush_icache_page(vma,page) do { } while (0)
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#define flush_icache_page(vma,page) do { } while (0)
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static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
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unsigned offset, size_t size)
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{
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const void *start = (void __force *)virt + offset;
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dmac_inv_range(start, start + size);
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}
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#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
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#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
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#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
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#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
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