[ALSA] cmipci: reorganize set_dac_channels()
By reorganizing the code that sets the CHB3DxC bits we can not only simplify this code but also fix the bug where the CHB3D8C bit was not reset when playing a stereo stream after a 7.1 stream. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
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35add1c295
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8ffbc01e2c
1 changed files with 21 additions and 32 deletions
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@ -738,48 +738,37 @@ static struct snd_pcm_hw_constraint_list hw_constraints_channels_8 = {
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static int set_dac_channels(struct cmipci *cm, struct cmipci_pcm *rec, int channels)
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{
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if (channels > 2) {
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if (! cm->can_multi_ch)
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if (!cm->can_multi_ch || !rec->ch)
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return -EINVAL;
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if (rec->fmt != 0x03) /* stereo 16bit only */
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return -EINVAL;
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}
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if (cm->can_multi_ch) {
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spin_lock_irq(&cm->reg_lock);
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snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
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snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
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if (channels > 4) {
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snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
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snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
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if (channels > 2) {
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snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
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snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
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} else {
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snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
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snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
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}
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if (channels >= 6) {
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snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
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snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
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} else {
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snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
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snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
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}
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if (cm->chip_version == 68) {
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if (channels == 8) {
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snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
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} else {
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snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
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}
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}
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spin_unlock_irq(&cm->reg_lock);
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} else {
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if (cm->can_multi_ch) {
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spin_lock_irq(&cm->reg_lock);
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snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_NXCHG);
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snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
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snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
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}
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if (channels == 8)
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snd_cmipci_set_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
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else
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snd_cmipci_clear_bit(cm, CM_REG_EXT_MISC, CM_CHB3D8C);
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if (channels == 6) {
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snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
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snd_cmipci_set_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
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} else {
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snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);
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snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
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snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
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snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);
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spin_unlock_irq(&cm->reg_lock);
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}
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if (channels == 4)
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snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
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else
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snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);
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spin_unlock_irq(&cm->reg_lock);
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}
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return 0;
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}
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