ath9k: split out access to rx status information
This patch passes in a pointer to the ath_rx_status data structure for functions that need it, instead of letting them grab it directly from the ath_desc struct. This is useful for making it possible to allocate the intermediate rx status data separately. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
db1a052b73
commit
8e6f5aa250
5 changed files with 52 additions and 60 deletions
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@ -660,30 +660,29 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,
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#undef PHY_ERR
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}
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void ath_debug_stat_rx(struct ath_softc *sc, struct ath_buf *bf)
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void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
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{
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#define RX_STAT_INC(c) sc->debug.stats.rxstats.c++
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#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
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struct ath_desc *ds = bf->bf_desc;
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u32 phyerr;
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
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if (rs->rs_status & ATH9K_RXERR_CRC)
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RX_STAT_INC(crc_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT)
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if (rs->rs_status & ATH9K_RXERR_DECRYPT)
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RX_STAT_INC(decrypt_crc_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC)
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if (rs->rs_status & ATH9K_RXERR_MIC)
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RX_STAT_INC(mic_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RX_DELIM_CRC_PRE)
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if (rs->rs_status & ATH9K_RX_DELIM_CRC_PRE)
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RX_STAT_INC(pre_delim_crc_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RX_DELIM_CRC_POST)
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if (rs->rs_status & ATH9K_RX_DELIM_CRC_POST)
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RX_STAT_INC(post_delim_crc_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RX_DECRYPT_BUSY)
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if (rs->rs_status & ATH9K_RX_DECRYPT_BUSY)
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RX_STAT_INC(decrypt_busy_err);
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY) {
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if (rs->rs_status & ATH9K_RXERR_PHY) {
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RX_STAT_INC(phy_err);
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phyerr = ds->ds_rxstat.rs_phyerr & 0x24;
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phyerr = rs->rs_phyerr & 0x24;
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RX_PHY_ERR_INC(phyerr);
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}
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@ -168,7 +168,7 @@ void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
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void ath_debug_stat_rc(struct ath_softc *sc, int final_rate);
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void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf, struct ath_tx_status *ts);
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void ath_debug_stat_rx(struct ath_softc *sc, struct ath_buf *bf);
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void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
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void ath_debug_stat_retries(struct ath_softc *sc, int rix,
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int xretries, int retries, u8 per);
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@ -859,7 +859,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
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EXPORT_SYMBOL(ath9k_hw_resettxqueue);
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int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
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u32 pa, struct ath_desc *nds, u64 tsf)
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struct ath_rx_status *rs, u64 tsf)
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{
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struct ar5416_desc ads;
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struct ar5416_desc *adsp = AR5416DESC(ds);
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@ -870,70 +870,70 @@ int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
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ads.u.rx = adsp->u.rx;
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ds->ds_rxstat.rs_status = 0;
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ds->ds_rxstat.rs_flags = 0;
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rs->rs_status = 0;
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rs->rs_flags = 0;
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ds->ds_rxstat.rs_datalen = ads.ds_rxstatus1 & AR_DataLen;
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ds->ds_rxstat.rs_tstamp = ads.AR_RcvTimestamp;
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rs->rs_datalen = ads.ds_rxstatus1 & AR_DataLen;
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rs->rs_tstamp = ads.AR_RcvTimestamp;
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if (ads.ds_rxstatus8 & AR_PostDelimCRCErr) {
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ds->ds_rxstat.rs_rssi = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ctl0 = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ctl1 = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ctl2 = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ext0 = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ext1 = ATH9K_RSSI_BAD;
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ds->ds_rxstat.rs_rssi_ext2 = ATH9K_RSSI_BAD;
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rs->rs_rssi = ATH9K_RSSI_BAD;
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rs->rs_rssi_ctl0 = ATH9K_RSSI_BAD;
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rs->rs_rssi_ctl1 = ATH9K_RSSI_BAD;
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rs->rs_rssi_ctl2 = ATH9K_RSSI_BAD;
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rs->rs_rssi_ext0 = ATH9K_RSSI_BAD;
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rs->rs_rssi_ext1 = ATH9K_RSSI_BAD;
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rs->rs_rssi_ext2 = ATH9K_RSSI_BAD;
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} else {
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ds->ds_rxstat.rs_rssi = MS(ads.ds_rxstatus4, AR_RxRSSICombined);
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ds->ds_rxstat.rs_rssi_ctl0 = MS(ads.ds_rxstatus0,
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rs->rs_rssi = MS(ads.ds_rxstatus4, AR_RxRSSICombined);
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rs->rs_rssi_ctl0 = MS(ads.ds_rxstatus0,
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AR_RxRSSIAnt00);
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ds->ds_rxstat.rs_rssi_ctl1 = MS(ads.ds_rxstatus0,
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rs->rs_rssi_ctl1 = MS(ads.ds_rxstatus0,
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AR_RxRSSIAnt01);
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ds->ds_rxstat.rs_rssi_ctl2 = MS(ads.ds_rxstatus0,
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rs->rs_rssi_ctl2 = MS(ads.ds_rxstatus0,
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AR_RxRSSIAnt02);
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ds->ds_rxstat.rs_rssi_ext0 = MS(ads.ds_rxstatus4,
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rs->rs_rssi_ext0 = MS(ads.ds_rxstatus4,
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AR_RxRSSIAnt10);
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ds->ds_rxstat.rs_rssi_ext1 = MS(ads.ds_rxstatus4,
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rs->rs_rssi_ext1 = MS(ads.ds_rxstatus4,
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AR_RxRSSIAnt11);
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ds->ds_rxstat.rs_rssi_ext2 = MS(ads.ds_rxstatus4,
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rs->rs_rssi_ext2 = MS(ads.ds_rxstatus4,
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AR_RxRSSIAnt12);
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}
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if (ads.ds_rxstatus8 & AR_RxKeyIdxValid)
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ds->ds_rxstat.rs_keyix = MS(ads.ds_rxstatus8, AR_KeyIdx);
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rs->rs_keyix = MS(ads.ds_rxstatus8, AR_KeyIdx);
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else
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ds->ds_rxstat.rs_keyix = ATH9K_RXKEYIX_INVALID;
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rs->rs_keyix = ATH9K_RXKEYIX_INVALID;
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ds->ds_rxstat.rs_rate = RXSTATUS_RATE(ah, (&ads));
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ds->ds_rxstat.rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
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rs->rs_rate = RXSTATUS_RATE(ah, (&ads));
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rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
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ds->ds_rxstat.rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
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ds->ds_rxstat.rs_moreaggr =
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rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
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rs->rs_moreaggr =
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(ads.ds_rxstatus8 & AR_RxMoreAggr) ? 1 : 0;
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ds->ds_rxstat.rs_antenna = MS(ads.ds_rxstatus3, AR_RxAntenna);
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ds->ds_rxstat.rs_flags =
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rs->rs_antenna = MS(ads.ds_rxstatus3, AR_RxAntenna);
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rs->rs_flags =
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(ads.ds_rxstatus3 & AR_GI) ? ATH9K_RX_GI : 0;
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ds->ds_rxstat.rs_flags |=
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rs->rs_flags |=
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(ads.ds_rxstatus3 & AR_2040) ? ATH9K_RX_2040 : 0;
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if (ads.ds_rxstatus8 & AR_PreDelimCRCErr)
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ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
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rs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
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if (ads.ds_rxstatus8 & AR_PostDelimCRCErr)
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ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_POST;
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rs->rs_flags |= ATH9K_RX_DELIM_CRC_POST;
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if (ads.ds_rxstatus8 & AR_DecryptBusyErr)
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ds->ds_rxstat.rs_flags |= ATH9K_RX_DECRYPT_BUSY;
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rs->rs_flags |= ATH9K_RX_DECRYPT_BUSY;
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if ((ads.ds_rxstatus8 & AR_RxFrameOK) == 0) {
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if (ads.ds_rxstatus8 & AR_CRCErr)
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ds->ds_rxstat.rs_status |= ATH9K_RXERR_CRC;
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rs->rs_status |= ATH9K_RXERR_CRC;
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else if (ads.ds_rxstatus8 & AR_PHYErr) {
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ds->ds_rxstat.rs_status |= ATH9K_RXERR_PHY;
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rs->rs_status |= ATH9K_RXERR_PHY;
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phyerr = MS(ads.ds_rxstatus8, AR_PHYErrCode);
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ds->ds_rxstat.rs_phyerr = phyerr;
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rs->rs_phyerr = phyerr;
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} else if (ads.ds_rxstatus8 & AR_DecryptCRCErr)
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ds->ds_rxstat.rs_status |= ATH9K_RXERR_DECRYPT;
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rs->rs_status |= ATH9K_RXERR_DECRYPT;
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else if (ads.ds_rxstatus8 & AR_MichaelErr)
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ds->ds_rxstat.rs_status |= ATH9K_RXERR_MIC;
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rs->rs_status |= ATH9K_RXERR_MIC;
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}
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return 0;
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@ -241,9 +241,6 @@ struct ath_desc {
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void *ds_vdata;
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} __packed;
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#define ds_rxstat ds_us.rx
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#define ds_stat ds_us.stats
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#define ATH9K_TXDESC_CLRDMASK 0x0001
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#define ATH9K_TXDESC_NOACK 0x0002
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#define ATH9K_TXDESC_RTSENA 0x0004
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@ -732,7 +729,7 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
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bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q);
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bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q);
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int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
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u32 pa, struct ath_desc *nds, u64 tsf);
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struct ath_rx_status *rs, u64 tsf);
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void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
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u32 size, u32 flags);
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bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set);
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@ -506,6 +506,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
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ds = bf->bf_desc;
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rx_stats = &ds->ds_us.rx;
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/*
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* Must provide the virtual address of the current
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@ -518,10 +519,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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* on. All this is necessary because of our use of
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* a self-linked list to avoid rx overruns.
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*/
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retval = ath9k_hw_rxprocdesc(ah, ds,
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bf->bf_daddr,
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PA2DESC(sc, ds->ds_link),
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0);
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retval = ath9k_hw_rxprocdesc(ah, ds, rx_stats, 0);
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if (retval == -EINPROGRESS) {
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struct ath_buf *tbf;
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struct ath_desc *tds;
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@ -545,8 +543,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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*/
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tds = tbf->bf_desc;
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retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
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PA2DESC(sc, tds->ds_link), 0);
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retval = ath9k_hw_rxprocdesc(ah, tds, &tds->ds_us.rx, 0);
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if (retval == -EINPROGRESS) {
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break;
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}
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@ -569,9 +566,8 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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rxs = IEEE80211_SKB_RXCB(skb);
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hw = ath_get_virt_hw(sc, hdr);
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rx_stats = &ds->ds_rxstat;
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ath_debug_stat_rx(sc, bf);
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ath_debug_stat_rx(sc, rx_stats);
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/*
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* If we're asked to flush receive queue, directly
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@ -626,7 +622,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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* change the default rx antenna if rx diversity chooses the
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* other antenna 3 times in a row.
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*/
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if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
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if (sc->rx.defant != rx_stats->rs_antenna) {
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if (++sc->rx.rxotherant >= 3)
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ath_setdefantenna(sc, rx_stats->rs_antenna);
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} else {
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