[PATCH] ieee1394: single buffer fixes to video1394
Apply and fixup patch from Markus Tavenrath <speedygoo@speedygoo.de> for video1394 to allow only a single buffer on receive and two buffers on transmit. Tested with libdc1394 and dvconnect (libdv). Signed-off-by: Dan Dennedy <dan@dennedy.org> Signed-off-by: Jody McIntyre <scjody@steamballoon.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
2554bd2a68
commit
8d98c5cd41
1 changed files with 85 additions and 25 deletions
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@ -35,6 +35,11 @@
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*
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*/
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/* Markus Tavenrath <speedygoo@speedygoo.de> :
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- fixed checks for valid buffer-numbers in video1394_icotl
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- changed the ways the dma prg's are used, now it's possible to use
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even a single dma buffer
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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@ -112,6 +117,7 @@ struct dma_iso_ctx {
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struct it_dma_prg **it_prg;
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unsigned int *buffer_status;
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unsigned int *buffer_prg_assignment;
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struct timeval *buffer_time; /* time when the buffer was received */
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unsigned int *last_used_cmd; /* For ISO Transmit with
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variable sized packets only ! */
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@ -183,6 +189,7 @@ static int free_dma_iso_ctx(struct dma_iso_ctx *d)
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kfree(d->ir_prg);
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kfree(d->it_prg);
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kfree(d->buffer_status);
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kfree(d->buffer_prg_assignment);
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kfree(d->buffer_time);
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kfree(d->last_used_cmd);
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kfree(d->next_buffer);
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@ -220,7 +227,7 @@ alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
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/* Init the regions for easy cleanup */
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dma_region_init(&d->dma);
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if (dma_region_alloc(&d->dma, d->num_desc * d->buf_size, ohci->dev,
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if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
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PCI_DMA_BIDIRECTIONAL)) {
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PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
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free_dma_iso_ctx(d);
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@ -332,6 +339,8 @@ alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
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d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),
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GFP_KERNEL);
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d->buffer_prg_assignment = kmalloc(d->num_desc * sizeof(unsigned int),
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GFP_KERNEL);
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d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),
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GFP_KERNEL);
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d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),
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@ -344,6 +353,11 @@ alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
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free_dma_iso_ctx(d);
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return NULL;
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}
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if (d->buffer_prg_assignment == NULL) {
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PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_prg_assignment");
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free_dma_iso_ctx(d);
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return NULL;
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}
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if (d->buffer_time == NULL) {
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PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_time");
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free_dma_iso_ctx(d);
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@ -360,6 +374,7 @@ alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
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return NULL;
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}
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memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));
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memset(d->buffer_prg_assignment, 0, d->num_desc * sizeof(unsigned int));
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memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));
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memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));
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memset(d->next_buffer, -1, d->num_desc * sizeof(int));
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@ -369,7 +384,7 @@ alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
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PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
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"of size %d allocated for a frame size %d, each with %d prgs",
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(type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
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d->num_desc, d->buf_size, d->frame_size, d->nb_cmd);
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d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
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return d;
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}
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@ -384,11 +399,36 @@ static void reset_ir_status(struct dma_iso_ctx *d, int n)
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d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
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}
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static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
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{
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struct dma_cmd *ir_prg = d->ir_prg[n];
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unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
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int i;
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d->buffer_prg_assignment[n] = buffer;
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ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
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(unsigned long)d->dma.kvirt));
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ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
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(buf + 4) - (unsigned long)d->dma.kvirt));
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for (i=2;i<d->nb_cmd-1;i++) {
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ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
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(buf+(i-1)*PAGE_SIZE) -
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(unsigned long)d->dma.kvirt));
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}
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ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
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DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
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ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
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(buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
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}
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static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
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{
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struct dma_cmd *ir_prg = d->ir_prg[n];
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struct dma_prog_region *ir_reg = &d->prg_reg[n];
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unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
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unsigned long buf = (unsigned long)d->dma.kvirt;
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int i;
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/* the first descriptor will read only 4 bytes */
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@ -498,7 +538,7 @@ static void wakeup_dma_ir_ctx(unsigned long l)
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for (i = 0; i < d->num_desc; i++) {
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if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
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reset_ir_status(d, i);
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d->buffer_status[i] = VIDEO1394_BUFFER_READY;
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d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
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do_gettimeofday(&d->buffer_time[i]);
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}
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}
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@ -575,7 +615,7 @@ static void wakeup_dma_it_ctx(unsigned long l)
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int next = d->next_buffer[i];
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put_timestamp(ohci, d, next);
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d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
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d->buffer_status[i] = VIDEO1394_BUFFER_READY;
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d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
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}
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}
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@ -585,11 +625,25 @@ static void wakeup_dma_it_ctx(unsigned long l)
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wake_up_interruptible(&d->waitq);
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}
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static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
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{
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struct it_dma_prg *it_prg = d->it_prg[n];
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unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
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int i;
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d->buffer_prg_assignment[n] = buffer;
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for (i=0;i<d->nb_cmd;i++) {
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it_prg[i].end.address =
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cpu_to_le32(dma_region_offset_to_bus(&d->dma,
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(buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
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}
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}
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static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
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{
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struct it_dma_prg *it_prg = d->it_prg[n];
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struct dma_prog_region *it_reg = &d->prg_reg[n];
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unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
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unsigned long buf = (unsigned long)d->dma.kvirt;
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int i;
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d->last_used_cmd[n] = d->nb_cmd - 1;
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for (i=0;i<d->nb_cmd;i++) {
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if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
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d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
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v.nb_buffers, v.buf_size,
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v.nb_buffers + 1, v.buf_size,
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v.channel, 0);
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if (d == NULL) {
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}
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else {
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d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
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v.nb_buffers, v.buf_size,
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v.nb_buffers + 1, v.buf_size,
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v.channel, v.packet_size);
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if (d == NULL) {
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{
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struct video1394_wait v;
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struct dma_iso_ctx *d;
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int next_prg;
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if (copy_from_user(&v, argp, sizeof(v)))
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return -EFAULT;
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d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
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if (d == NULL) return -EFAULT;
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if ((v.buffer<0) || (v.buffer>d->num_desc)) {
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if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
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PRINT(KERN_ERR, ohci->host->id,
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"Buffer %d out of range",v.buffer);
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return -EINVAL;
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d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
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next_prg = (d->last_buffer + 1) % d->num_desc;
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if (d->last_buffer>=0)
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d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0)
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
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& 0xfffffff0) | 0x1);
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d->last_buffer = v.buffer;
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d->last_buffer = next_prg;
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reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
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d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
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/* Tell the controller where the first program is */
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reg_write(ohci, d->cmdPtr,
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dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x1);
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dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
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/* Run IR context */
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reg_write(ohci, d->ctrlSet, 0x8000);
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{
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struct video1394_wait v;
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struct dma_iso_ctx *d;
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int i;
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int i = 0;
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if (copy_from_user(&v, argp, sizeof(v)))
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return -EFAULT;
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d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
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if (d == NULL) return -EFAULT;
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if ((v.buffer<0) || (v.buffer>d->num_desc)) {
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if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
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PRINT(KERN_ERR, ohci->host->id,
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"Buffer %d out of range",v.buffer);
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return -EINVAL;
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* Look ahead to see how many more buffers have been received
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*/
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i=0;
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while (d->buffer_status[(v.buffer+1)%d->num_desc]==
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while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
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VIDEO1394_BUFFER_READY) {
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v.buffer=(v.buffer+1)%d->num_desc;
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v.buffer=(v.buffer+1)%(d->num_desc - 1);
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i++;
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}
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spin_unlock_irqrestore(&d->lock, flags);
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struct video1394_wait v;
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unsigned int *psizes = NULL;
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struct dma_iso_ctx *d;
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int next_prg;
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if (copy_from_user(&v, argp, sizeof(v)))
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return -EFAULT;
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d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
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if (d == NULL) return -EFAULT;
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if ((v.buffer<0) || (v.buffer>d->num_desc)) {
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if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
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PRINT(KERN_ERR, ohci->host->id,
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"Buffer %d out of range",v.buffer);
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return -EINVAL;
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spin_lock_irqsave(&d->lock,flags);
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// last_buffer is last_prg
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next_prg = (d->last_buffer + 1) % d->num_desc;
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if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
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PRINT(KERN_ERR, ohci->host->id,
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"Buffer %d is already used",v.buffer);
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if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
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initialize_dma_it_prg_var_packet_queue(
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d, v.buffer, psizes,
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ohci);
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d, next_prg, psizes, ohci);
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}
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d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
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if (d->last_buffer >= 0) {
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d->it_prg[d->last_buffer]
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[ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
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0) & 0xfffffff0) | 0x3);
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d->it_prg[d->last_buffer]
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[ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
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cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
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0) & 0xfffffff0) | 0x3);
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d->next_buffer[d->last_buffer] = v.buffer;
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d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
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}
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d->last_buffer = v.buffer;
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d->last_buffer = next_prg;
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reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
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d->next_buffer[d->last_buffer] = -1;
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d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
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/* Tell the controller where the first program is */
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reg_write(ohci, d->cmdPtr,
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dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x3);
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dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
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/* Run IT context */
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reg_write(ohci, d->ctrlSet, 0x8000);
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d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
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if (d == NULL) return -EFAULT;
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if ((v.buffer<0) || (v.buffer>d->num_desc)) {
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if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
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PRINT(KERN_ERR, ohci->host->id,
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"Buffer %d out of range",v.buffer);
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return -EINVAL;
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