[Blackfin] arch: initial generic time and clock sources
This patch enables Hight-Res Timers and tickless kernel Signed-off-by: Vitja Makarov <vitja.makarov@gmail.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Vitja Makarov
Bryan Wu
parent
3dc5063786
commit
8b5f79f9d7
4 changed files with 253 additions and 20 deletions
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@ -47,10 +47,6 @@ config GENERIC_IRQ_PROBE
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bool
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default y
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config GENERIC_TIME
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bool
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default n
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config GENERIC_GPIO
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bool
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default y
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@ -415,6 +411,30 @@ comment "Kernel Timer/Scheduler"
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source kernel/Kconfig.hz
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config GENERIC_TIME
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bool "Generic time"
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default y
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config GENERIC_CLOCKEVENTS
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bool "Generic clock events"
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depends on GENERIC_TIME
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default y
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config CYCLES_CLOCKSOURCE
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bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)"
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depends on EXPERIMENTAL
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depends on GENERIC_CLOCKEVENTS
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depends on !BFIN_SCRATCH_REG_CYCLES
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default n
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help
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If you say Y here, you will enable support for using the 'cycles'
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registers as a clock source. Doing so means you will be unable to
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safely write to the 'cycles' register during runtime. You will
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still be able to read it (such as for performance monitoring), but
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writing the registers will most likely crash the kernel.
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source kernel/time/Kconfig
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comment "Memory Setup"
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config MEM_SIZE
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@ -6,9 +6,15 @@ extra-y := init_task.o vmlinux.lds
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obj-y := \
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entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
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sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
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sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
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fixed_code.o reboot.o bfin_gpio.o
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ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
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obj-y += time-ts.o
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else
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obj-y += time.o
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endif
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obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
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obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
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@ -32,6 +32,8 @@
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#include <linux/unistd.h>
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#include <linux/user.h>
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#include <linux/uaccess.h>
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#include <linux/sched.h>
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#include <linux/tick.h>
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#include <linux/fs.h>
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#include <linux/err.h>
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@ -69,33 +71,44 @@ EXPORT_SYMBOL(pm_power_off);
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* The idle loop on BFIN
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*/
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#ifdef CONFIG_IDLE_L1
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void default_idle(void)__attribute__((l1_text));
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static void default_idle(void)__attribute__((l1_text));
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void cpu_idle(void)__attribute__((l1_text));
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#endif
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void default_idle(void)
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/*
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* This is our default idle handler. We need to disable
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* interrupts here to ensure we don't miss a wakeup call.
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*/
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static void default_idle(void)
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{
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while (!need_resched()) {
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local_irq_disable();
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if (likely(!need_resched()))
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if (!need_resched())
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idle_with_irq_disabled();
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local_irq_enable();
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}
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}
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void (*idle)(void) = default_idle;
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/*
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* The idle thread. There's no useful work to be
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* done, so just try to conserve power and have a
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* low exit latency (ie sit in a loop waiting for
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* somebody to say that they'd like to reschedule)
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* The idle thread. We try to conserve power, while trying to keep
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* overall latency low. The architecture specific idle is passed
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* a value to indicate the level of "idleness" of the system.
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*/
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void cpu_idle(void)
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{
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/* endless idle loop with no priority at all */
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while (1) {
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void (*idle)(void) = pm_idle;
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#ifdef CONFIG_HOTPLUG_CPU
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if (cpu_is_offline(smp_processor_id()))
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cpu_die();
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#endif
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if (!idle)
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idle = default_idle;
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tick_nohz_stop_sched_tick();
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while (!need_resched())
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idle();
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tick_nohz_restart_sched_tick();
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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194
arch/blackfin/kernel/time-ts.c
Normal file
194
arch/blackfin/kernel/time-ts.c
Normal file
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@ -0,0 +1,194 @@
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/*
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* linux/arch/kernel/time-ts.c
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*
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* Based on arm clockevents implementation and old bfin time tick.
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*
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* Copyright(C) 2008, GeoTechnologies, Vitja Makarov
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*
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* This code is licenced under the GPL version 2. For details see
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* kernel-base/COPYING.
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*/
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#include <linux/module.h>
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#include <linux/profile.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/irq.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <asm/blackfin.h>
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#ifdef CONFIG_CYCLES_CLOCKSOURCE
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static unsigned long cyc2ns_scale;
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#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
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static inline void set_cyc2ns_scale(unsigned long cpu_khz)
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{
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cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR) / cpu_khz;
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}
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static inline unsigned long long cycles_2_ns(cycle_t cyc)
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{
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return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
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}
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static cycle_t read_cycles(void)
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{
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unsigned long tmp, tmp2;
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asm("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2));
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return tmp | ((cycle_t)tmp2 << 32);
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}
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unsigned long long sched_clock(void)
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{
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return cycles_2_ns(read_cycles());
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}
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static struct clocksource clocksource_bfin = {
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.name = "bfin_cycles",
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.rating = 350,
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.read = read_cycles,
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.mask = CLOCKSOURCE_MASK(64),
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.shift = 22,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init bfin_clocksource_init(void)
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{
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set_cyc2ns_scale(get_cclk() / 1000);
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clocksource_bfin.mult = clocksource_hz2mult(get_cclk(), clocksource_bfin.shift);
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if (clocksource_register(&clocksource_bfin))
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panic("failed to register clocksource");
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return 0;
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}
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#else
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# define bfin_clocksource_init()
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#endif
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static int bfin_timer_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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{
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bfin_write_TCOUNT(cycles);
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CSYNC();
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return 0;
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}
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static void bfin_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC: {
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unsigned long tcount = ((get_cclk() / (HZ * 1)) - 1);
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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bfin_write_TPERIOD(tcount);
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bfin_write_TCOUNT(tcount);
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bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
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CSYNC();
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break;
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}
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case CLOCK_EVT_MODE_ONESHOT:
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bfin_write_TCOUNT(0);
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bfin_write_TCNTL(TMPWR | TMREN);
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CSYNC();
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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bfin_write_TCNTL(0);
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CSYNC();
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break;
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case CLOCK_EVT_MODE_RESUME:
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break;
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}
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}
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static void __init bfin_timer_init(void)
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{
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/* power up the timer, but don't enable it just yet */
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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/*
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* the TSCALE prescaler counter.
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*/
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bfin_write_TSCALE(0);
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bfin_write_TPERIOD(0);
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bfin_write_TCOUNT(0);
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/* now enable the timer */
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CSYNC();
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}
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick
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*/
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#ifdef CONFIG_CORE_TIMER_IRQ_L1
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__attribute__((l1_text))
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#endif
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irqreturn_t timer_interrupt(int irq, void *dev_id);
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static struct clock_event_device clockevent_bfin = {
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.name = "bfin_core_timer",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.cpumask = CPU_MASK_CPU0,
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.set_next_event = bfin_timer_set_next_event,
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.set_mode = bfin_timer_set_mode,
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};
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static struct irqaction bfin_timer_irq = {
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.name = "Blackfin Core Timer",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = timer_interrupt,
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.dev_id = &clockevent_bfin,
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};
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irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static int __init bfin_clockevent_init(void)
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{
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setup_irq(IRQ_CORETMR, &bfin_timer_irq);
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bfin_timer_init();
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clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
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clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
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clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
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clockevents_register_device(&clockevent_bfin);
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return 0;
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}
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void __init time_init(void)
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{
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time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
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#ifdef CONFIG_RTC_DRV_BFIN
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/* [#2663] hack to filter junk RTC values that would cause
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* userspace to have to deal with time values greater than
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* 2^31 seconds (which uClibc cannot cope with yet)
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*/
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if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) {
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printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n");
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bfin_write_RTC_STAT(0);
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}
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#endif
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/* Initialize xtime. From now on, xtime is updated with timer interrupts */
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xtime.tv_sec = secs_since_1970;
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xtime.tv_nsec = 0;
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set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
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bfin_clocksource_init();
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bfin_clockevent_init();
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}
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