Merge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6
* 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6: agp: fix SIS 5591/5592 wrong PCI id intel/agp: rewrite GTT on resume agp: use dev_printk when possible amd64-agp: run fallback when no bridges found, not when driver registration fails intel_agp: official name for GM45 chipset
This commit is contained in:
Linus Torvalds
commit
88fa08f67b
13 changed files with 205 additions and 144 deletions
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@ -148,6 +148,9 @@ struct agp_bridge_data {
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char minor_version;
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struct list_head list;
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u32 apbase_config;
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/* list of agp_memory mapped to the aperture */
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struct list_head mapped_list;
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spinlock_t mapped_lock;
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};
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#define KB(x) ((x) * 1024)
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@ -110,7 +110,8 @@ static int ali_configure(void)
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nlvm_addr+= agp_bridge->gart_bus_addr;
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nlvm_addr|=(agp_bridge->gart_bus_addr>>12);
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printk(KERN_INFO PFX "nlvm top &base = %8x\n",nlvm_addr);
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dev_info(&agp_bridge->dev->dev, "nlvm top &base = %8x\n",
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nlvm_addr);
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}
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#endif
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@ -315,8 +316,8 @@ static int __devinit agp_ali_probe(struct pci_dev *pdev,
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goto found;
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}
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printk(KERN_ERR PFX "Unsupported ALi chipset (device id: %04x)\n",
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pdev->device);
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dev_err(&pdev->dev, "unsupported ALi chipset [%04x/%04x])\n",
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pdev->vendor, pdev->device);
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return -ENODEV;
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@ -361,8 +362,7 @@ static int __devinit agp_ali_probe(struct pci_dev *pdev,
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bridge->driver = &ali_generic_bridge;
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}
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printk(KERN_INFO PFX "Detected ALi %s chipset\n",
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devs[j].chipset_name);
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dev_info(&pdev->dev, "ALi %s chipset\n", devs[j].chipset_name);
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/* Fill in the mode register */
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pci_read_config_dword(pdev,
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@ -419,8 +419,8 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
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return -ENODEV;
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j = ent - agp_amdk7_pci_table;
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printk(KERN_INFO PFX "Detected AMD %s chipset\n",
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amd_agp_device_ids[j].chipset_name);
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dev_info(&pdev->dev, "AMD %s chipset\n",
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amd_agp_device_ids[j].chipset_name);
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bridge = agp_alloc_bridge();
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if (!bridge)
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@ -442,7 +442,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
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while (!cap_ptr) {
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gfxcard = pci_get_class(PCI_CLASS_DISPLAY_VGA<<8, gfxcard);
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if (!gfxcard) {
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printk (KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
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dev_info(&pdev->dev, "no AGP VGA controller\n");
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return -ENODEV;
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}
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cap_ptr = pci_find_capability(gfxcard, PCI_CAP_ID_AGP);
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@ -453,7 +453,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
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(if necessary at all). */
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if (gfxcard->vendor == PCI_VENDOR_ID_NVIDIA) {
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agp_bridge->flags |= AGP_ERRATA_1X;
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printk (KERN_INFO PFX "AMD 751 chipset with NVidia GeForce detected. Forcing to 1X due to errata.\n");
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dev_info(&pdev->dev, "AMD 751 chipset with NVidia GeForce; forcing 1X due to errata\n");
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}
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pci_dev_put(gfxcard);
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}
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@ -469,7 +469,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
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agp_bridge->flags = AGP_ERRATA_FASTWRITES;
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agp_bridge->flags |= AGP_ERRATA_SBA;
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agp_bridge->flags |= AGP_ERRATA_1X;
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printk (KERN_INFO PFX "AMD 761 chipset with errata detected - disabling AGP fast writes & SBA and forcing to 1X.\n");
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dev_info(&pdev->dev, "AMD 761 chipset with errata; disabling AGP fast writes & SBA and forcing to 1X\n");
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}
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}
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@ -34,6 +34,7 @@
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static struct resource *aperture_resource;
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static int __initdata agp_try_unsupported = 1;
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static int agp_bridges_found;
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static void amd64_tlbflush(struct agp_memory *temp)
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{
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@ -293,12 +294,13 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp,
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* so let double check that order, and lets trust the AMD NB settings
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*/
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if (order >=0 && aper + (32ULL<<(20 + order)) > 0x100000000ULL) {
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printk(KERN_INFO "Aperture size %u MB is not right, using settings from NB\n",
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32 << order);
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dev_info(&agp->dev, "aperture size %u MB is not right, using settings from NB\n",
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32 << order);
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order = nb_order;
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}
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printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order);
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dev_info(&agp->dev, "aperture from AGP @ %Lx size %u MB\n",
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aper, 32 << order);
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if (order < 0 || !agp_aperture_valid(aper, (32*1024*1024)<<order))
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return -1;
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@ -319,10 +321,10 @@ static __devinit int cache_nbs (struct pci_dev *pdev, u32 cap_ptr)
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for (i = 0; i < num_k8_northbridges; i++) {
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struct pci_dev *dev = k8_northbridges[i];
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if (fix_northbridge(dev, pdev, cap_ptr) < 0) {
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printk(KERN_ERR PFX "No usable aperture found.\n");
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dev_err(&dev->dev, "no usable aperture found\n");
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#ifdef __x86_64__
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/* should port this to i386 */
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printk(KERN_ERR PFX "Consider rebooting with iommu=memaper=2 to get a good aperture.\n");
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dev_err(&dev->dev, "consider rebooting with iommu=memaper=2 to get a good aperture\n");
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#endif
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return -1;
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}
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@ -345,14 +347,14 @@ static void __devinit amd8151_init(struct pci_dev *pdev, struct agp_bridge_data
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default: revstring="??"; break;
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}
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printk (KERN_INFO PFX "Detected AMD 8151 AGP Bridge rev %s\n", revstring);
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dev_info(&pdev->dev, "AMD 8151 AGP Bridge rev %s\n", revstring);
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/*
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* Work around errata.
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* Chips before B2 stepping incorrectly reporting v3.5
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*/
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if (pdev->revision < 0x13) {
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printk (KERN_INFO PFX "Correcting AGP revision (reports 3.5, is really 3.0)\n");
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dev_info(&pdev->dev, "correcting AGP revision (reports 3.5, is really 3.0)\n");
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bridge->major_version = 3;
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bridge->minor_version = 0;
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}
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@ -375,11 +377,11 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
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struct pci_dev *dev1;
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int i;
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unsigned size = amd64_fetch_size();
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printk(KERN_INFO "Setting up ULi AGP.\n");
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dev_info(&pdev->dev, "setting up ULi AGP\n");
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dev1 = pci_get_slot (pdev->bus,PCI_DEVFN(0,0));
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if (dev1 == NULL) {
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printk(KERN_INFO PFX "Detected a ULi chipset, "
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"but could not fine the secondary device.\n");
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dev_info(&pdev->dev, "can't find ULi secondary device\n");
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return -ENODEV;
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}
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@ -388,7 +390,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
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break;
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if (i == ARRAY_SIZE(uli_sizes)) {
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printk(KERN_INFO PFX "No ULi size found for %d\n", size);
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dev_info(&pdev->dev, "no ULi size found for %d\n", size);
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return -ENODEV;
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}
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@ -433,13 +435,11 @@ static int nforce3_agp_init(struct pci_dev *pdev)
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int i;
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unsigned size = amd64_fetch_size();
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printk(KERN_INFO PFX "Setting up Nforce3 AGP.\n");
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dev_info(&pdev->dev, "setting up Nforce3 AGP\n");
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dev1 = pci_get_slot(pdev->bus, PCI_DEVFN(11, 0));
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if (dev1 == NULL) {
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printk(KERN_INFO PFX "agpgart: Detected an NVIDIA "
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"nForce3 chipset, but could not find "
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"the secondary device.\n");
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dev_info(&pdev->dev, "can't find Nforce3 secondary device\n");
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return -ENODEV;
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}
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@ -448,7 +448,7 @@ static int nforce3_agp_init(struct pci_dev *pdev)
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break;
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if (i == ARRAY_SIZE(nforce3_sizes)) {
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printk(KERN_INFO PFX "No NForce3 size found for %d\n", size);
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dev_info(&pdev->dev, "no NForce3 size found for %d\n", size);
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return -ENODEV;
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}
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@ -462,7 +462,7 @@ static int nforce3_agp_init(struct pci_dev *pdev)
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/* if x86-64 aperture base is beyond 4G, exit here */
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if ( (apbase & 0x7fff) >> (32 - 25) ) {
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printk(KERN_INFO PFX "aperture base > 4G\n");
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dev_info(&pdev->dev, "aperture base > 4G\n");
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return -ENODEV;
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}
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@ -489,6 +489,7 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
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{
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struct agp_bridge_data *bridge;
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u8 cap_ptr;
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int err;
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cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
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if (!cap_ptr)
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@ -504,7 +505,8 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
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pdev->device == PCI_DEVICE_ID_AMD_8151_0) {
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amd8151_init(pdev, bridge);
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} else {
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printk(KERN_INFO PFX "Detected AGP bridge %x\n", pdev->devfn);
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dev_info(&pdev->dev, "AGP bridge [%04x/%04x]\n",
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pdev->vendor, pdev->device);
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}
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bridge->driver = &amd_8151_driver;
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@ -536,7 +538,12 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
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}
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pci_set_drvdata(pdev, bridge);
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return agp_add_bridge(bridge);
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err = agp_add_bridge(bridge);
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if (err < 0)
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return err;
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agp_bridges_found++;
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return 0;
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}
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static void __devexit agp_amd64_remove(struct pci_dev *pdev)
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@ -713,7 +720,11 @@ int __init agp_amd64_init(void)
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if (agp_off)
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return -EINVAL;
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if (pci_register_driver(&agp_amd64_pci_driver) < 0) {
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err = pci_register_driver(&agp_amd64_pci_driver);
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if (err < 0)
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return err;
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if (agp_bridges_found == 0) {
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struct pci_dev *dev;
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if (!agp_try_unsupported && !agp_try_unsupported_boot) {
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printk(KERN_INFO PFX "No supported AGP bridge found.\n");
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@ -486,8 +486,8 @@ static int __devinit agp_ati_probe(struct pci_dev *pdev,
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goto found;
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}
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printk(KERN_ERR PFX
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"Unsupported Ati chipset (device id: %04x)\n", pdev->device);
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dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n",
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pdev->vendor, pdev->device);
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return -ENODEV;
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found:
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@ -500,8 +500,7 @@ static int __devinit agp_ati_probe(struct pci_dev *pdev,
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bridge->driver = &ati_generic_bridge;
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printk(KERN_INFO PFX "Detected Ati %s chipset\n",
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devs[j].chipset_name);
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dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name);
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/* Fill in the mode register */
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pci_read_config_dword(pdev,
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@ -144,7 +144,8 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
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void *addr = bridge->driver->agp_alloc_page(bridge);
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if (!addr) {
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printk(KERN_ERR PFX "unable to get memory for scratch page.\n");
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dev_err(&bridge->dev->dev,
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"can't get memory for scratch page\n");
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return -ENOMEM;
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}
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@ -155,13 +156,13 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
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size_value = bridge->driver->fetch_size();
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if (size_value == 0) {
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printk(KERN_ERR PFX "unable to determine aperture size.\n");
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dev_err(&bridge->dev->dev, "can't determine aperture size\n");
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rc = -EINVAL;
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goto err_out;
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}
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if (bridge->driver->create_gatt_table(bridge)) {
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printk(KERN_ERR PFX
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"unable to get memory for graphics translation table.\n");
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dev_err(&bridge->dev->dev,
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"can't get memory for graphics translation table\n");
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rc = -ENOMEM;
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goto err_out;
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}
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@ -169,7 +170,8 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
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bridge->key_list = vmalloc(PAGE_SIZE * 4);
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if (bridge->key_list == NULL) {
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printk(KERN_ERR PFX "error allocating memory for key lists.\n");
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dev_err(&bridge->dev->dev,
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"can't allocate memory for key lists\n");
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rc = -ENOMEM;
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goto err_out;
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}
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@ -179,10 +181,12 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
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memset(bridge->key_list, 0, PAGE_SIZE * 4);
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if (bridge->driver->configure()) {
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printk(KERN_ERR PFX "error configuring host chipset.\n");
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dev_err(&bridge->dev->dev, "error configuring host chipset\n");
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rc = -EINVAL;
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goto err_out;
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}
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INIT_LIST_HEAD(&bridge->mapped_list);
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spin_lock_init(&bridge->mapped_lock);
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return 0;
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@ -269,25 +273,27 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
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/* Grab reference on the chipset driver. */
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if (!try_module_get(bridge->driver->owner)) {
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printk (KERN_INFO PFX "Couldn't lock chipset driver.\n");
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dev_info(&bridge->dev->dev, "can't lock chipset driver\n");
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return -EINVAL;
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}
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|
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error = agp_backend_initialize(bridge);
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if (error) {
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printk (KERN_INFO PFX "agp_backend_initialize() failed.\n");
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dev_info(&bridge->dev->dev,
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"agp_backend_initialize() failed\n");
|
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goto err_out;
|
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}
|
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|
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if (list_empty(&agp_bridges)) {
|
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error = agp_frontend_initialize();
|
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if (error) {
|
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printk (KERN_INFO PFX "agp_frontend_initialize() failed.\n");
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dev_info(&bridge->dev->dev,
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"agp_frontend_initialize() failed\n");
|
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goto frontend_err;
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}
|
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|
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printk(KERN_INFO PFX "AGP aperture is %dM @ 0x%lx\n",
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bridge->driver->fetch_size(), bridge->gart_bus_addr);
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dev_info(&bridge->dev->dev, "AGP aperture is %dM @ 0x%lx\n",
|
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bridge->driver->fetch_size(), bridge->gart_bus_addr);
|
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|
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}
|
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|
||||
|
|
|
|||
|
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@ -429,6 +429,10 @@ int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
|
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|
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curr->is_bound = true;
|
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curr->pg_start = pg_start;
|
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spin_lock(&agp_bridge->mapped_lock);
|
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list_add(&curr->mapped_list, &agp_bridge->mapped_list);
|
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spin_unlock(&agp_bridge->mapped_lock);
|
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|
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return 0;
|
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}
|
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EXPORT_SYMBOL(agp_bind_memory);
|
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|
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@ -461,10 +465,34 @@ int agp_unbind_memory(struct agp_memory *curr)
|
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|
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curr->is_bound = false;
|
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curr->pg_start = 0;
|
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spin_lock(&curr->bridge->mapped_lock);
|
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list_del(&curr->mapped_list);
|
||||
spin_unlock(&curr->bridge->mapped_lock);
|
||||
return 0;
|
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}
|
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EXPORT_SYMBOL(agp_unbind_memory);
|
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|
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/**
|
||||
* agp_rebind_emmory - Rewrite the entire GATT, useful on resume
|
||||
*/
|
||||
int agp_rebind_memory(void)
|
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{
|
||||
struct agp_memory *curr;
|
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int ret_val = 0;
|
||||
|
||||
spin_lock(&agp_bridge->mapped_lock);
|
||||
list_for_each_entry(curr, &agp_bridge->mapped_list, mapped_list) {
|
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ret_val = curr->bridge->driver->insert_memory(curr,
|
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curr->pg_start,
|
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curr->type);
|
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if (ret_val != 0)
|
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break;
|
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}
|
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spin_unlock(&agp_bridge->mapped_lock);
|
||||
return ret_val;
|
||||
}
|
||||
EXPORT_SYMBOL(agp_rebind_memory);
|
||||
|
||||
/* End - Routines for handling swapping of agp_memory into the GATT */
|
||||
|
||||
|
||||
|
|
@ -771,8 +799,8 @@ void agp_device_command(u32 bridge_agpstat, bool agp_v3)
|
|||
if (!agp)
|
||||
continue;
|
||||
|
||||
printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
|
||||
agp_v3 ? 3 : 2, pci_name(device), mode);
|
||||
dev_info(&device->dev, "putting AGP V%d device into %dx mode\n",
|
||||
agp_v3 ? 3 : 2, mode);
|
||||
pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
|
||||
}
|
||||
}
|
||||
|
|
@ -800,10 +828,8 @@ void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
|
|||
|
||||
get_agp_version(agp_bridge);
|
||||
|
||||
printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
|
||||
agp_bridge->major_version,
|
||||
agp_bridge->minor_version,
|
||||
pci_name(agp_bridge->dev));
|
||||
dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
|
||||
agp_bridge->major_version, agp_bridge->minor_version);
|
||||
|
||||
pci_read_config_dword(agp_bridge->dev,
|
||||
agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
|
||||
|
|
@ -832,8 +858,7 @@ void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
|
|||
pci_write_config_dword(bridge->dev,
|
||||
bridge->capndx+AGPCTRL, temp);
|
||||
|
||||
printk(KERN_INFO PFX "Device is in legacy mode,"
|
||||
" falling back to 2.x\n");
|
||||
dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,8 +32,8 @@
|
|||
#define PCI_DEVICE_ID_INTEL_Q35_IG 0x29B2
|
||||
#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
|
||||
#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
|
||||
#define PCI_DEVICE_ID_INTEL_IGD_HB 0x2A40
|
||||
#define PCI_DEVICE_ID_INTEL_IGD_IG 0x2A42
|
||||
#define PCI_DEVICE_ID_INTEL_GM45_HB 0x2A40
|
||||
#define PCI_DEVICE_ID_INTEL_GM45_IG 0x2A42
|
||||
#define PCI_DEVICE_ID_INTEL_IGD_E_HB 0x2E00
|
||||
#define PCI_DEVICE_ID_INTEL_IGD_E_IG 0x2E02
|
||||
#define PCI_DEVICE_ID_INTEL_Q45_HB 0x2E10
|
||||
|
|
@ -55,7 +55,7 @@
|
|||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
|
||||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
|
||||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB || \
|
||||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
|
||||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB)
|
||||
|
||||
#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
|
||||
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
|
||||
|
|
@ -161,7 +161,7 @@ static int intel_i810_fetch_size(void)
|
|||
values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
|
||||
|
||||
if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
|
||||
printk(KERN_WARNING PFX "i810 is disabled\n");
|
||||
dev_warn(&agp_bridge->dev->dev, "i810 is disabled\n");
|
||||
return 0;
|
||||
}
|
||||
if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
|
||||
|
|
@ -193,7 +193,8 @@ static int intel_i810_configure(void)
|
|||
|
||||
intel_private.registers = ioremap(temp, 128 * 4096);
|
||||
if (!intel_private.registers) {
|
||||
printk(KERN_ERR PFX "Unable to remap memory.\n");
|
||||
dev_err(&intel_private.pcidev->dev,
|
||||
"can't remap memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
|
@ -201,7 +202,8 @@ static int intel_i810_configure(void)
|
|||
if ((readl(intel_private.registers+I810_DRAM_CTL)
|
||||
& I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
|
||||
/* This will need to be dynamically assigned */
|
||||
printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"detected 4MB dedicated video ram\n");
|
||||
intel_private.num_dcache_entries = 1024;
|
||||
}
|
||||
pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &temp);
|
||||
|
|
@ -500,8 +502,8 @@ static void intel_i830_init_gtt_entries(void)
|
|||
size = 1024 + 512;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_INFO PFX "Unknown page table size, "
|
||||
"assuming 512KB\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"unknown page table size, assuming 512KB\n");
|
||||
size = 512;
|
||||
}
|
||||
size += 4; /* add in BIOS popup space */
|
||||
|
|
@ -515,8 +517,8 @@ static void intel_i830_init_gtt_entries(void)
|
|||
size = 2048;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_INFO PFX "Unknown page table size 0x%x, "
|
||||
"assuming 512KB\n",
|
||||
dev_info(&agp_bridge->dev->dev,
|
||||
"unknown page table size 0x%x, assuming 512KB\n",
|
||||
(gmch_ctrl & G33_PGETBL_SIZE_MASK));
|
||||
size = 512;
|
||||
}
|
||||
|
|
@ -627,11 +629,11 @@ static void intel_i830_init_gtt_entries(void)
|
|||
}
|
||||
}
|
||||
if (gtt_entries > 0)
|
||||
printk(KERN_INFO PFX "Detected %dK %s memory.\n",
|
||||
dev_info(&agp_bridge->dev->dev, "detected %dK %s memory\n",
|
||||
gtt_entries / KB(1), local ? "local" : "stolen");
|
||||
else
|
||||
printk(KERN_INFO PFX
|
||||
"No pre-allocated video memory detected.\n");
|
||||
dev_info(&agp_bridge->dev->dev,
|
||||
"no pre-allocated video memory detected\n");
|
||||
gtt_entries /= KB(4);
|
||||
|
||||
intel_private.gtt_entries = gtt_entries;
|
||||
|
|
@ -801,10 +803,12 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
|
|||
num_entries = A_SIZE_FIX(temp)->num_entries;
|
||||
|
||||
if (pg_start < intel_private.gtt_entries) {
|
||||
printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
|
||||
pg_start, intel_private.gtt_entries);
|
||||
dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
|
||||
"pg_start == 0x%.8lx, intel_private.gtt_entries == 0x%.8x\n",
|
||||
pg_start, intel_private.gtt_entries);
|
||||
|
||||
printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"trying to insert into local/stolen memory\n");
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
|
|
@ -851,7 +855,8 @@ static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
|
|||
return 0;
|
||||
|
||||
if (pg_start < intel_private.gtt_entries) {
|
||||
printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"trying to disable local/stolen memory\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -957,7 +962,7 @@ static void intel_i9xx_setup_flush(void)
|
|||
if (intel_private.ifp_resource.start) {
|
||||
intel_private.i9xx_flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
|
||||
if (!intel_private.i9xx_flush_page)
|
||||
printk(KERN_INFO "unable to ioremap flush page - no chipset flushing");
|
||||
dev_info(&intel_private.pcidev->dev, "can't ioremap flush page - no chipset flushing");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1028,10 +1033,12 @@ static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
|
|||
num_entries = A_SIZE_FIX(temp)->num_entries;
|
||||
|
||||
if (pg_start < intel_private.gtt_entries) {
|
||||
printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
|
||||
pg_start, intel_private.gtt_entries);
|
||||
dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
|
||||
"pg_start == 0x%.8lx, intel_private.gtt_entries == 0x%.8x\n",
|
||||
pg_start, intel_private.gtt_entries);
|
||||
|
||||
printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"trying to insert into local/stolen memory\n");
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
|
|
@ -1078,7 +1085,8 @@ static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
|
|||
return 0;
|
||||
|
||||
if (pg_start < intel_private.gtt_entries) {
|
||||
printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
|
||||
dev_info(&intel_private.pcidev->dev,
|
||||
"trying to disable local/stolen memory\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -1182,7 +1190,7 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
|
|||
static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
|
||||
{
|
||||
switch (agp_bridge->dev->device) {
|
||||
case PCI_DEVICE_ID_INTEL_IGD_HB:
|
||||
case PCI_DEVICE_ID_INTEL_GM45_HB:
|
||||
case PCI_DEVICE_ID_INTEL_IGD_E_HB:
|
||||
case PCI_DEVICE_ID_INTEL_Q45_HB:
|
||||
case PCI_DEVICE_ID_INTEL_G45_HB:
|
||||
|
|
@ -1379,7 +1387,7 @@ static int intel_815_configure(void)
|
|||
/* the Intel 815 chipset spec. says that bits 29-31 in the
|
||||
* ATTBASE register are reserved -> try not to write them */
|
||||
if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
|
||||
printk(KERN_EMERG PFX "gatt bus addr too high");
|
||||
dev_emerg(&agp_bridge->dev->dev, "gatt bus addr too high");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -2117,8 +2125,8 @@ static const struct intel_driver_description {
|
|||
NULL, &intel_g33_driver },
|
||||
{ PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
|
||||
NULL, &intel_g33_driver },
|
||||
{ PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
|
||||
"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
|
||||
{ PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,
|
||||
"Mobile Intel? GM45 Express", NULL, &intel_i965_driver },
|
||||
{ PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
|
||||
"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
|
||||
{ PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
|
||||
|
|
@ -2163,8 +2171,8 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
|
||||
if (intel_agp_chipsets[i].name == NULL) {
|
||||
if (cap_ptr)
|
||||
printk(KERN_WARNING PFX "Unsupported Intel chipset"
|
||||
"(device id: %04x)\n", pdev->device);
|
||||
dev_warn(&pdev->dev, "unsupported Intel chipset [%04x/%04x]\n",
|
||||
pdev->vendor, pdev->device);
|
||||
agp_put_bridge(bridge);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
@ -2172,9 +2180,8 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
if (bridge->driver == NULL) {
|
||||
/* bridge has no AGP and no IGD detected */
|
||||
if (cap_ptr)
|
||||
printk(KERN_WARNING PFX "Failed to find bridge device "
|
||||
"(chip_id: %04x)\n",
|
||||
intel_agp_chipsets[i].gmch_chip_id);
|
||||
dev_warn(&pdev->dev, "can't find bridge device (chip_id: %04x)\n",
|
||||
intel_agp_chipsets[i].gmch_chip_id);
|
||||
agp_put_bridge(bridge);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
@ -2183,8 +2190,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
bridge->capndx = cap_ptr;
|
||||
bridge->dev_private_data = &intel_private;
|
||||
|
||||
printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n",
|
||||
intel_agp_chipsets[i].name);
|
||||
dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
|
||||
|
||||
/*
|
||||
* The following fixes the case where the BIOS has "forgotten" to
|
||||
|
|
@ -2194,7 +2200,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
r = &pdev->resource[0];
|
||||
if (!r->start && r->end) {
|
||||
if (pci_assign_resource(pdev, 0)) {
|
||||
printk(KERN_ERR PFX "could not assign resource 0\n");
|
||||
dev_err(&pdev->dev, "can't assign resource 0\n");
|
||||
agp_put_bridge(bridge);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
@ -2206,7 +2212,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
* 20030610 - hamish@zot.org
|
||||
*/
|
||||
if (pci_enable_device(pdev)) {
|
||||
printk(KERN_ERR PFX "Unable to Enable PCI device\n");
|
||||
dev_err(&pdev->dev, "can't enable PCI device\n");
|
||||
agp_put_bridge(bridge);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
@ -2238,6 +2244,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
|
|||
static int agp_intel_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
|
||||
int ret_val;
|
||||
|
||||
pci_restore_state(pdev);
|
||||
|
||||
|
|
@ -2265,6 +2272,10 @@ static int agp_intel_resume(struct pci_dev *pdev)
|
|||
else if (bridge->driver == &intel_i965_driver)
|
||||
intel_i915_configure();
|
||||
|
||||
ret_val = agp_rebind_memory();
|
||||
if (ret_val != 0)
|
||||
return ret_val;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -2315,7 +2326,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
|
|||
ID(PCI_DEVICE_ID_INTEL_G33_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_Q35_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_Q33_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_IGD_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_GM45_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_Q45_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_G45_HB),
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
|
|||
|
||||
/* Check if this configuration has any chance of working */
|
||||
if (tot_bw > target.maxbw) {
|
||||
printk(KERN_ERR PFX "isochronous bandwidth required "
|
||||
dev_err(&td->dev, "isochronous bandwidth required "
|
||||
"by AGP 3.0 devices exceeds that which is supported by "
|
||||
"the AGP 3.0 bridge!\n");
|
||||
ret = -ENODEV;
|
||||
|
|
@ -188,7 +188,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
|
|||
/* Exit if the minimal ISOCH_N allocation among the masters is more
|
||||
* than the target can handle. */
|
||||
if (tot_n > target.n) {
|
||||
printk(KERN_ERR PFX "number of isochronous "
|
||||
dev_err(&td->dev, "number of isochronous "
|
||||
"transactions per period required by AGP 3.0 devices "
|
||||
"exceeds that which is supported by the AGP 3.0 "
|
||||
"bridge!\n");
|
||||
|
|
@ -229,7 +229,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
|
|||
/* Exit if the minimal RQ needs of the masters exceeds what the target
|
||||
* can provide. */
|
||||
if (tot_rq > rq_isoch) {
|
||||
printk(KERN_ERR PFX "number of request queue slots "
|
||||
dev_err(&td->dev, "number of request queue slots "
|
||||
"required by the isochronous bandwidth requested by "
|
||||
"AGP 3.0 devices exceeds the number provided by the "
|
||||
"AGP 3.0 bridge!\n");
|
||||
|
|
@ -359,8 +359,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
|
|||
case 0x0001: /* Unclassified device */
|
||||
/* Don't know what this is, but log it for investigation. */
|
||||
if (mcapndx != 0) {
|
||||
printk (KERN_INFO PFX "Wacky, found unclassified AGP device. %x:%x\n",
|
||||
dev->vendor, dev->device);
|
||||
dev_info(&td->dev, "wacky, found unclassified AGP device %s [%04x/%04x]\n",
|
||||
pci_name(dev),
|
||||
dev->vendor, dev->device);
|
||||
}
|
||||
continue;
|
||||
|
||||
|
|
@ -407,17 +408,18 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
|
|||
}
|
||||
|
||||
if (mcapndx == 0) {
|
||||
printk(KERN_ERR PFX "woah! Non-AGP device "
|
||||
"found on the secondary bus of an AGP 3.5 bridge!\n");
|
||||
dev_err(&td->dev, "woah! Non-AGP device %s on "
|
||||
"secondary bus of AGP 3.5 bridge!\n",
|
||||
pci_name(dev));
|
||||
ret = -ENODEV;
|
||||
goto free_and_exit;
|
||||
}
|
||||
|
||||
mmajor = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
|
||||
if (mmajor < 3) {
|
||||
printk(KERN_ERR PFX "woah! AGP 2.0 device "
|
||||
"found on the secondary bus of an AGP 3.5 "
|
||||
"bridge operating with AGP 3.0 electricals!\n");
|
||||
dev_err(&td->dev, "woah! AGP 2.0 device %s on "
|
||||
"secondary bus of AGP 3.5 bridge operating "
|
||||
"with AGP 3.0 electricals!\n", pci_name(dev));
|
||||
ret = -ENODEV;
|
||||
goto free_and_exit;
|
||||
}
|
||||
|
|
@ -427,10 +429,10 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
|
|||
pci_read_config_dword(dev, cur->capndx+AGPSTAT, &mstatus);
|
||||
|
||||
if (((mstatus >> 3) & 0x1) == 0) {
|
||||
printk(KERN_ERR PFX "woah! AGP 3.x device "
|
||||
"not operating in AGP 3.x mode found on the "
|
||||
"secondary bus of an AGP 3.5 bridge operating "
|
||||
"with AGP 3.0 electricals!\n");
|
||||
dev_err(&td->dev, "woah! AGP 3.x device %s not "
|
||||
"operating in AGP 3.x mode on secondary bus "
|
||||
"of AGP 3.5 bridge operating with AGP 3.0 "
|
||||
"electricals!\n", pci_name(dev));
|
||||
ret = -ENODEV;
|
||||
goto free_and_exit;
|
||||
}
|
||||
|
|
@ -444,9 +446,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
|
|||
if (isoch) {
|
||||
ret = agp_3_5_isochronous_node_enable(bridge, dev_list, ndevs);
|
||||
if (ret) {
|
||||
printk(KERN_INFO PFX "Something bad happened setting "
|
||||
"up isochronous xfers. Falling back to "
|
||||
"non-isochronous xfer mode.\n");
|
||||
dev_info(&td->dev, "something bad happened setting "
|
||||
"up isochronous xfers; falling back to "
|
||||
"non-isochronous xfer mode\n");
|
||||
} else {
|
||||
goto free_and_exit;
|
||||
}
|
||||
|
|
@ -466,4 +468,3 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
|
|||
get_out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -79,10 +79,8 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
|
|||
u32 command;
|
||||
int rate;
|
||||
|
||||
printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
|
||||
agp_bridge->major_version,
|
||||
agp_bridge->minor_version,
|
||||
pci_name(agp_bridge->dev));
|
||||
dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
|
||||
agp_bridge->major_version, agp_bridge->minor_version);
|
||||
|
||||
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
|
||||
command = agp_collect_device_status(bridge, mode, command);
|
||||
|
|
@ -94,8 +92,8 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
|
|||
if (!agp)
|
||||
continue;
|
||||
|
||||
printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
|
||||
pci_name(device), rate);
|
||||
dev_info(&agp_bridge->dev->dev, "putting AGP V3 device at %s into %dx mode\n",
|
||||
pci_name(device), rate);
|
||||
|
||||
pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
|
||||
|
||||
|
|
@ -105,7 +103,7 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
|
|||
* cannot be configured
|
||||
*/
|
||||
if (device->device == bridge->dev->device) {
|
||||
printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
|
||||
dev_info(&agp_bridge->dev->dev, "SiS delay workaround: giving bridge time to recover\n");
|
||||
msleep(10);
|
||||
}
|
||||
}
|
||||
|
|
@ -190,7 +188,8 @@ static int __devinit agp_sis_probe(struct pci_dev *pdev,
|
|||
return -ENODEV;
|
||||
|
||||
|
||||
printk(KERN_INFO PFX "Detected SiS chipset - id:%i\n", pdev->device);
|
||||
dev_info(&pdev->dev, "SiS chipset [%04x/%04x]\n",
|
||||
pdev->vendor, pdev->device);
|
||||
bridge = agp_alloc_bridge();
|
||||
if (!bridge)
|
||||
return -ENOMEM;
|
||||
|
|
@ -242,7 +241,7 @@ static struct pci_device_id agp_sis_pci_table[] = {
|
|||
.class = (PCI_CLASS_BRIDGE_HOST << 8),
|
||||
.class_mask = ~0,
|
||||
.vendor = PCI_VENDOR_ID_SI,
|
||||
.device = PCI_DEVICE_ID_SI_5591_AGP,
|
||||
.device = PCI_DEVICE_ID_SI_5591,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
},
|
||||
|
|
|
|||
|
|
@ -241,7 +241,8 @@ static void serverworks_tlbflush(struct agp_memory *temp)
|
|||
while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) {
|
||||
cpu_relax();
|
||||
if (time_after(jiffies, timeout)) {
|
||||
printk(KERN_ERR PFX "TLB post flush took more than 3 seconds\n");
|
||||
dev_err(&serverworks_private.svrwrks_dev->dev,
|
||||
"TLB post flush took more than 3 seconds\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -251,7 +252,8 @@ static void serverworks_tlbflush(struct agp_memory *temp)
|
|||
while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
|
||||
cpu_relax();
|
||||
if (time_after(jiffies, timeout)) {
|
||||
printk(KERN_ERR PFX "TLB Dir flush took more than 3 seconds\n");
|
||||
dev_err(&serverworks_private.svrwrks_dev->dev,
|
||||
"TLB Dir flush took more than 3 seconds\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -271,7 +273,7 @@ static int serverworks_configure(void)
|
|||
temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
|
||||
serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
|
||||
if (!serverworks_private.registers) {
|
||||
printk (KERN_ERR PFX "Unable to ioremap() memory.\n");
|
||||
dev_err(&agp_bridge->dev->dev, "can't ioremap(%#x)\n", temp);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
|
@ -451,7 +453,7 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
|
|||
|
||||
switch (pdev->device) {
|
||||
case 0x0006:
|
||||
printk (KERN_ERR PFX "ServerWorks CNB20HE is unsupported due to lack of documentation.\n");
|
||||
dev_err(&pdev->dev, "ServerWorks CNB20HE is unsupported due to lack of documentation\n");
|
||||
return -ENODEV;
|
||||
|
||||
case PCI_DEVICE_ID_SERVERWORKS_HE:
|
||||
|
|
@ -461,8 +463,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
|
|||
|
||||
default:
|
||||
if (cap_ptr)
|
||||
printk(KERN_ERR PFX "Unsupported Serverworks chipset "
|
||||
"(device id: %04x)\n", pdev->device);
|
||||
dev_err(&pdev->dev, "unsupported Serverworks chipset "
|
||||
"[%04x/%04x]\n", pdev->vendor, pdev->device);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
|
@ -470,8 +472,7 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
|
|||
bridge_dev = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
|
||||
PCI_DEVFN(0, 1));
|
||||
if (!bridge_dev) {
|
||||
printk(KERN_INFO PFX "Detected a Serverworks chipset "
|
||||
"but could not find the secondary device.\n");
|
||||
dev_info(&pdev->dev, "can't find secondary device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
|
@ -482,8 +483,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
|
|||
if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
|
||||
pci_read_config_dword(pdev, SVWRKS_APSIZE + 4, &temp2);
|
||||
if (temp2 != 0) {
|
||||
printk(KERN_INFO PFX "Detected 64 bit aperture address, "
|
||||
"but top bits are not zero. Disabling agp\n");
|
||||
dev_info(&pdev->dev, "64 bit aperture address, "
|
||||
"but top bits are not zero; disabling AGP\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
serverworks_private.mm_addr_ofs = 0x18;
|
||||
|
|
@ -495,8 +496,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
|
|||
pci_read_config_dword(pdev,
|
||||
serverworks_private.mm_addr_ofs + 4, &temp2);
|
||||
if (temp2 != 0) {
|
||||
printk(KERN_INFO PFX "Detected 64 bit MMIO address, "
|
||||
"but top bits are not zero. Disabling agp\n");
|
||||
dev_info(&pdev->dev, "64 bit MMIO address, but top "
|
||||
"bits are not zero; disabling AGP\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -46,8 +46,8 @@ static int uninorth_fetch_size(void)
|
|||
break;
|
||||
|
||||
if (i == agp_bridge->driver->num_aperture_sizes) {
|
||||
printk(KERN_ERR PFX "Invalid aperture size, using"
|
||||
" default\n");
|
||||
dev_err(&agp_bridge->dev->dev, "invalid aperture size, "
|
||||
"using default\n");
|
||||
size = 0;
|
||||
aperture = NULL;
|
||||
}
|
||||
|
|
@ -108,8 +108,8 @@ static int uninorth_configure(void)
|
|||
|
||||
current_size = A_SIZE_32(agp_bridge->current_size);
|
||||
|
||||
printk(KERN_INFO PFX "configuring for size idx: %d\n",
|
||||
current_size->size_value);
|
||||
dev_info(&agp_bridge->dev->dev, "configuring for size idx: %d\n",
|
||||
current_size->size_value);
|
||||
|
||||
/* aperture size and gatt addr */
|
||||
pci_write_config_dword(agp_bridge->dev,
|
||||
|
|
@ -197,8 +197,9 @@ static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
|
|||
gp = (u32 *) &agp_bridge->gatt_table[pg_start];
|
||||
for (i = 0; i < mem->page_count; ++i) {
|
||||
if (gp[i]) {
|
||||
printk("u3_insert_memory: entry 0x%x occupied (%x)\n",
|
||||
i, gp[i]);
|
||||
dev_info(&agp_bridge->dev->dev,
|
||||
"u3_insert_memory: entry 0x%x occupied (%x)\n",
|
||||
i, gp[i]);
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
|
|
@ -276,8 +277,8 @@ static void uninorth_agp_enable(struct agp_bridge_data *bridge, u32 mode)
|
|||
&scratch);
|
||||
} while ((scratch & PCI_AGP_COMMAND_AGP) == 0 && ++timeout < 1000);
|
||||
if ((scratch & PCI_AGP_COMMAND_AGP) == 0)
|
||||
printk(KERN_ERR PFX "failed to write UniNorth AGP"
|
||||
" command register\n");
|
||||
dev_err(&bridge->dev->dev, "can't write UniNorth AGP "
|
||||
"command register\n");
|
||||
|
||||
if (uninorth_rev >= 0x30) {
|
||||
/* This is an AGP V3 */
|
||||
|
|
@ -330,8 +331,8 @@ static int agp_uninorth_suspend(struct pci_dev *pdev)
|
|||
pci_read_config_dword(device, agp + PCI_AGP_COMMAND, &cmd);
|
||||
if (!(cmd & PCI_AGP_COMMAND_AGP))
|
||||
continue;
|
||||
printk("uninorth-agp: disabling AGP on device %s\n",
|
||||
pci_name(device));
|
||||
dev_info(&pdev->dev, "disabling AGP on device %s\n",
|
||||
pci_name(device));
|
||||
cmd &= ~PCI_AGP_COMMAND_AGP;
|
||||
pci_write_config_dword(device, agp + PCI_AGP_COMMAND, cmd);
|
||||
}
|
||||
|
|
@ -341,8 +342,7 @@ static int agp_uninorth_suspend(struct pci_dev *pdev)
|
|||
pci_read_config_dword(pdev, agp + PCI_AGP_COMMAND, &cmd);
|
||||
bridge->dev_private_data = (void *)(long)cmd;
|
||||
if (cmd & PCI_AGP_COMMAND_AGP) {
|
||||
printk("uninorth-agp: disabling AGP on bridge %s\n",
|
||||
pci_name(pdev));
|
||||
dev_info(&pdev->dev, "disabling AGP on bridge\n");
|
||||
cmd &= ~PCI_AGP_COMMAND_AGP;
|
||||
pci_write_config_dword(pdev, agp + PCI_AGP_COMMAND, cmd);
|
||||
}
|
||||
|
|
@ -591,14 +591,14 @@ static int __devinit agp_uninorth_probe(struct pci_dev *pdev,
|
|||
/* probe for known chipsets */
|
||||
for (j = 0; devs[j].chipset_name != NULL; ++j) {
|
||||
if (pdev->device == devs[j].device_id) {
|
||||
printk(KERN_INFO PFX "Detected Apple %s chipset\n",
|
||||
devs[j].chipset_name);
|
||||
dev_info(&pdev->dev, "Apple %s chipset\n",
|
||||
devs[j].chipset_name);
|
||||
goto found;
|
||||
}
|
||||
}
|
||||
|
||||
printk(KERN_ERR PFX "Unsupported Apple chipset (device id: %04x).\n",
|
||||
pdev->device);
|
||||
dev_err(&pdev->dev, "unsupported Apple chipset [%04x/%04x]\n",
|
||||
pdev->vendor, pdev->device);
|
||||
return -ENODEV;
|
||||
|
||||
found:
|
||||
|
|
|
|||
|
|
@ -30,6 +30,8 @@
|
|||
#ifndef _AGP_BACKEND_H
|
||||
#define _AGP_BACKEND_H 1
|
||||
|
||||
#include <linux/list.h>
|
||||
|
||||
enum chipset_type {
|
||||
NOT_SUPPORTED,
|
||||
SUPPORTED,
|
||||
|
|
@ -78,6 +80,8 @@ struct agp_memory {
|
|||
bool is_bound;
|
||||
bool is_flushed;
|
||||
bool vmalloc_flag;
|
||||
/* list of agp_memory mapped to the aperture */
|
||||
struct list_head mapped_list;
|
||||
};
|
||||
|
||||
#define AGP_NORMAL_MEMORY 0
|
||||
|
|
@ -96,6 +100,7 @@ extern struct agp_memory *agp_allocate_memory(struct agp_bridge_data *, size_t,
|
|||
extern int agp_copy_info(struct agp_bridge_data *, struct agp_kern_info *);
|
||||
extern int agp_bind_memory(struct agp_memory *, off_t);
|
||||
extern int agp_unbind_memory(struct agp_memory *);
|
||||
extern int agp_rebind_memory(void);
|
||||
extern void agp_enable(struct agp_bridge_data *, u32);
|
||||
extern struct agp_bridge_data *agp_backend_acquire(struct pci_dev *);
|
||||
extern void agp_backend_release(struct agp_bridge_data *);
|
||||
|
|
|
|||
Loading…
Reference in a new issue