ath9k_hw: remove AR9003 2.0 support
These chipsets will not hit the market, all customers will be on >= AR9003 2.2. This shaves down the ath9k_hw size by 24161 bytes (24 KB) on my system. Before: $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko text data bss dec hex filename 292328 616 1824 294768 47f70 drivers/net/wireless/ath/ath9k/ath9k_hw.ko $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko 5987825 drivers/net/wireless/ath/ath9k/ath9k_hw.ko After: $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko text data bss dec hex filename 277192 616 1824 279632 44450 drivers/net/wireless/ath/ath9k/ath9k_hw.ko $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko 5963664 drivers/net/wireless/ath/ath9k/ath9k_hw.ko Cc: Yixiang Li <yixiang.li@atheros.com> Cc: Don Breslin <don.breslin@atheros.com> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez
John W. Linville
parent
6db507ff92
commit
886b42bf5e
3 changed files with 26 additions and 1923 deletions
File diff suppressed because it is too large
Load diff
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@ -16,7 +16,6 @@
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#include "hw.h"
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#include "ar9003_mac.h"
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#include "ar9003_2p0_initvals.h"
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#include "ar9003_2p2_initvals.h"
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/* General hardware code for the AR9003 hadware family */
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@ -32,79 +31,12 @@ static bool ar9003_hw_macversion_supported(u32 macversion)
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return false;
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}
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/* AR9003 2.0 */
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static void ar9003_2p0_hw_init_mode_regs(struct ath_hw *ah)
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{
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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ar9300_2p0_mac_core,
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ARRAY_SIZE(ar9300_2p0_mac_core), 2);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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ar9300_2p0_mac_postamble,
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ARRAY_SIZE(ar9300_2p0_mac_postamble), 5);
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/* bb */
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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ar9300_2p0_baseband_core,
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ARRAY_SIZE(ar9300_2p0_baseband_core), 2);
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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ar9300_2p0_baseband_postamble,
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ARRAY_SIZE(ar9300_2p0_baseband_postamble), 5);
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/* radio */
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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ar9300_2p0_radio_core,
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ARRAY_SIZE(ar9300_2p0_radio_core), 2);
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
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ar9300_2p0_radio_postamble,
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ARRAY_SIZE(ar9300_2p0_radio_postamble), 5);
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/* soc */
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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ar9300_2p0_soc_preamble,
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ARRAY_SIZE(ar9300_2p0_soc_preamble), 2);
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
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ar9300_2p0_soc_postamble,
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ARRAY_SIZE(ar9300_2p0_soc_postamble), 5);
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/* rx/tx gain */
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_rx_gain_table_2p0,
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ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), 2);
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_lowest_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0),
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5);
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/* Load PCIE SERDES settings from INI */
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/* Awake Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdes,
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ar9300PciePhy_pll_on_clkreq_disable_L1_2p0,
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ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0),
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2);
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/* Sleep Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
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ar9300PciePhy_clkreq_enable_L1_2p0,
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ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p0),
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2);
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/* Fast clock modal settings */
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INIT_INI_ARRAY(&ah->iniModesAdditional,
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ar9300Modes_fast_clock_2p0,
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ARRAY_SIZE(ar9300Modes_fast_clock_2p0),
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3);
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}
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/* AR9003 2.2 */
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static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah)
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/*
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* The AR9003 family uses a new INI format (pre, core, post
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* arrays per subsystem). This provides support for the
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* AR9003 2.2 chipsets.
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*/
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static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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{
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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@ -174,57 +106,27 @@ static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah)
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3);
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}
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/*
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* The AR9003 family uses a new INI format (pre, core, post
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* arrays per subsystem).
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*/
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static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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{
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if (AR_SREV_9300_20(ah))
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ar9003_2p0_hw_init_mode_regs(ah);
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else
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ar9003_2p2_hw_init_mode_regs(ah);
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}
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static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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{
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switch (ar9003_hw_get_tx_gain_idx(ah)) {
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case 0:
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default:
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if (AR_SREV_9300_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_lowest_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0),
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5);
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else
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
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5);
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
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5);
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break;
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case 1:
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if (AR_SREV_9300_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_high_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0),
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5);
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else
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_high_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
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5);
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_high_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
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5);
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break;
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case 2:
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if (AR_SREV_9300_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_low_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0),
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5);
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else
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_low_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
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5);
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_low_ob_db_tx_gain_table_2p2,
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ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
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5);
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break;
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}
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}
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@ -234,28 +136,16 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
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switch (ar9003_hw_get_rx_gain_idx(ah)) {
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case 0:
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default:
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if (AR_SREV_9300_20(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_rx_gain_table_2p0,
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ARRAY_SIZE(ar9300Common_rx_gain_table_2p0),
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2);
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else
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_rx_gain_table_2p2,
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ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
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2);
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_rx_gain_table_2p2,
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ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
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2);
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break;
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case 1:
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if (AR_SREV_9300_20(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_wo_xlna_rx_gain_table_2p0,
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ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0),
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2);
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else
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_wo_xlna_rx_gain_table_2p2,
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ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
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2);
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_wo_xlna_rx_gain_table_2p2,
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ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
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2);
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break;
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}
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}
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@ -853,9 +853,6 @@
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#define AR_SREV_9300(_ah) \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
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#define AR_SREV_9300_20(_ah) \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300) && \
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((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_20))
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#define AR_SREV_9300_20_OR_LATER(_ah) \
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(((_ah)->hw_version.macVersion > AR_SREV_VERSION_9300) || \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300) && \
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