atmel: checkpatch.pl cleanups
Before: 881 errors, 265 warnings, 4507 lines checked After: 114 errors, 273 warnings, 4548 lines checked This was mostly "space required after that ',' (ctx:VxV)". Also a fair number of whitespace, code indent, and C99 comment cleanups. New warnings introduced are all "line over 80 character" md5sums are identical, as I skipped any fixes which may have altered the resulting binary. Signed-off-by: John Daiker <daikerjohn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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62b4fb66c5
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1 changed files with 240 additions and 199 deletions
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@ -106,35 +106,35 @@ static struct {
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#define MAX_BSS_ENTRIES 64
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/* registers */
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#define GCR 0x00 // (SIR0) General Configuration Register
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#define BSR 0x02 // (SIR1) Bank Switching Select Register
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#define GCR 0x00 /* (SIR0) General Configuration Register */
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#define BSR 0x02 /* (SIR1) Bank Switching Select Register */
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#define AR 0x04
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#define DR 0x08
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#define MR1 0x12 // Mirror Register 1
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#define MR2 0x14 // Mirror Register 2
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#define MR3 0x16 // Mirror Register 3
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#define MR4 0x18 // Mirror Register 4
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#define MR1 0x12 /* Mirror Register 1 */
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#define MR2 0x14 /* Mirror Register 2 */
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#define MR3 0x16 /* Mirror Register 3 */
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#define MR4 0x18 /* Mirror Register 4 */
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#define GPR1 0x0c
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#define GPR2 0x0e
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#define GPR3 0x10
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//
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// Constants for the GCR register.
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//
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#define GCR_REMAP 0x0400 // Remap internal SRAM to 0
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#define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
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#define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
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#define GCR_ENINT 0x0002 // Enable Interrupts
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#define GCR_ACKINT 0x0008 // Acknowledge Interrupts
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/*
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* Constants for the GCR register.
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*/
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#define GCR_REMAP 0x0400 /* Remap internal SRAM to 0 */
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#define GCR_SWRES 0x0080 /* BIU reset (ARM and PAI are NOT reset) */
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#define GCR_CORES 0x0060 /* Core Reset (ARM and PAI are reset) */
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#define GCR_ENINT 0x0002 /* Enable Interrupts */
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#define GCR_ACKINT 0x0008 /* Acknowledge Interrupts */
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#define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
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#define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
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//
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// Constants for the MR registers.
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//
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#define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
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#define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
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#define MAC_INIT_OK 0x0002 // MAC boot has been completed
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#define BSS_SRAM 0x0200 /* AMBA module selection --> SRAM */
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#define BSS_IRAM 0x0100 /* AMBA module selection --> IRAM */
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/*
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*Constants for the MR registers.
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*/
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#define MAC_INIT_COMPLETE 0x0001 /* MAC init has been completed */
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#define MAC_BOOT_COMPLETE 0x0010 /* MAC boot has been completed */
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#define MAC_INIT_OK 0x0002 /* MAC boot has been completed */
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#define MIB_MAX_DATA_BYTES 212
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#define MIB_HEADER_SIZE 4 /* first four fields */
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@ -212,9 +212,9 @@ struct tx_desc {
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#define TX_DESC_PACKET_TYPE_OFFSET 17
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#define TX_DESC_HOST_LENGTH_OFFSET 18
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///////////////////////////////////////////////////////
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// Host-MAC interface
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///////////////////////////////////////////////////////
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/*
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* Host-MAC interface
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*/
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#define TX_STATUS_SUCCESS 0x00
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@ -226,14 +226,14 @@ struct tx_desc {
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#define TX_PACKET_TYPE_DATA 0x01
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#define TX_PACKET_TYPE_MGMT 0x02
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#define ISR_EMPTY 0x00 // no bits set in ISR
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#define ISR_TxCOMPLETE 0x01 // packet transmitted
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#define ISR_RxCOMPLETE 0x02 // packet received
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#define ISR_RxFRAMELOST 0x04 // Rx Frame lost
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#define ISR_FATAL_ERROR 0x08 // Fatal error
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#define ISR_COMMAND_COMPLETE 0x10 // command completed
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#define ISR_OUT_OF_RANGE 0x20 // command completed
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#define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
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#define ISR_EMPTY 0x00 /* no bits set in ISR */
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#define ISR_TxCOMPLETE 0x01 /* packet transmitted */
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#define ISR_RxCOMPLETE 0x02 /* packet received */
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#define ISR_RxFRAMELOST 0x04 /* Rx Frame lost */
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#define ISR_FATAL_ERROR 0x08 /* Fatal error */
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#define ISR_COMMAND_COMPLETE 0x10 /* command completed */
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#define ISR_OUT_OF_RANGE 0x20 /* command completed */
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#define ISR_IBSS_MERGE 0x40 /* (4.1.2.30): IBSS merge */
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#define ISR_GENERIC_IRQ 0x80
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#define Local_Mib_Type 0x01
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@ -311,22 +311,22 @@ struct tx_desc {
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#define MAX_ENCRYPTION_KEYS 4
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#define MAX_ENCRYPTION_KEY_SIZE 40
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///////////////////////////////////////////////////////////////////////////
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// 802.11 related definitions
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///////////////////////////////////////////////////////////////////////////
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/*
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* 802.11 related definitions
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*/
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//
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// Regulatory Domains
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//
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/*
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* Regulatory Domains
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*/
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#define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
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#define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
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#define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
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#define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
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#define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
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#define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
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#define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
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#define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
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#define REG_DOMAIN_FCC 0x10 /* Channels 1-11 USA */
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#define REG_DOMAIN_DOC 0x20 /* Channel 1-11 Canada */
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#define REG_DOMAIN_ETSI 0x30 /* Channel 1-13 Europe (ex Spain/France) */
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#define REG_DOMAIN_SPAIN 0x31 /* Channel 10-11 Spain */
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#define REG_DOMAIN_FRANCE 0x32 /* Channel 10-13 France */
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#define REG_DOMAIN_MKK 0x40 /* Channel 14 Japan */
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#define REG_DOMAIN_MKK1 0x41 /* Channel 1-14 Japan(MKK1) */
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#define REG_DOMAIN_ISRAEL 0x50 /* Channel 3-9 ISRAEL */
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#define BSS_TYPE_AD_HOC 1
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#define BSS_TYPE_INFRASTRUCTURE 2
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@ -364,13 +364,13 @@ struct tx_desc {
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#define CIPHER_SUITE_CCX 4
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#define CIPHER_SUITE_WEP_128 5
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//
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// IFACE MACROS & definitions
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//
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//
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/*
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* IFACE MACROS & definitions
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*/
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// FuncCtrl field:
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//
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/*
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* FuncCtrl field:
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*/
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#define FUNC_CTRL_TxENABLE 0x10
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#define FUNC_CTRL_RxENABLE 0x20
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#define FUNC_CTRL_INIT_COMPLETE 0x01
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@ -433,7 +433,7 @@ struct atmel_private {
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struct net_device *dev;
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struct device *sys_dev;
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struct iw_statistics wstats;
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spinlock_t irqlock, timerlock; // spinlocks
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spinlock_t irqlock, timerlock; /* spinlocks */
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enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
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enum {
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CARD_TYPE_PARALLEL_FLASH,
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@ -1420,10 +1420,17 @@ static int atmel_proc_output (char *buf, struct atmel_private *priv)
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priv->firmware_id);
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switch (priv->card_type) {
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case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
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case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
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case CARD_TYPE_EEPROM: c = "EEPROM"; break;
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default: c = "<unknown>";
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case CARD_TYPE_PARALLEL_FLASH:
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c = "Parallel flash";
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break;
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case CARD_TYPE_SPI_FLASH:
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c = "SPI flash\n";
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break;
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case CARD_TYPE_EEPROM:
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c = "EEPROM";
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break;
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default:
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c = "<unknown>";
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}
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r = "<unknown>";
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@ -1440,15 +1447,32 @@ static int atmel_proc_output (char *buf, struct atmel_private *priv)
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}
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switch (priv->station_state) {
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case STATION_STATE_SCANNING: s = "Scanning"; break;
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case STATION_STATE_JOINNING: s = "Joining"; break;
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case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
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case STATION_STATE_ASSOCIATING: s = "Associating"; break;
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case STATION_STATE_READY: s = "Ready"; break;
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case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
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case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
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case STATION_STATE_DOWN: s = "Down"; break;
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default: s = "<unknown>";
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case STATION_STATE_SCANNING:
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s = "Scanning";
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break;
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case STATION_STATE_JOINNING:
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s = "Joining";
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break;
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case STATION_STATE_AUTHENTICATING:
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s = "Authenticating";
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break;
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case STATION_STATE_ASSOCIATING:
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s = "Associating";
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break;
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case STATION_STATE_READY:
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s = "Ready";
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break;
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case STATION_STATE_REASSOCIATING:
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s = "Reassociating";
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break;
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case STATION_STATE_MGMT_ERROR:
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s = "Management error";
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break;
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case STATION_STATE_DOWN:
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s = "Down";
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break;
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default:
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s = "<unknown>";
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}
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p += sprintf(p, "Current state:\t\t%s\n", s);
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{
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struct atmel_private *priv = data;
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int len = atmel_proc_output (page, priv);
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if (len <= off+count) *eof = 1;
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if (len <= off+count)
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*eof = 1;
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*start = page + off;
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len -= off;
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if (len>count) len = count;
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if (len<0) len = 0;
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if (len > count)
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len = count;
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if (len < 0)
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len = 0;
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return len;
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}
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@ -2013,11 +2040,20 @@ static int atmel_set_rate(struct net_device *dev,
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} else {
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/* Setting by frequency value */
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switch (vwrq->value) {
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case 1000000: priv->tx_rate = 0; break;
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case 2000000: priv->tx_rate = 1; break;
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case 5500000: priv->tx_rate = 2; break;
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case 11000000: priv->tx_rate = 3; break;
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default: return -EINVAL;
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case 1000000:
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priv->tx_rate = 0;
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break;
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case 2000000:
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priv->tx_rate = 1;
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break;
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case 5500000:
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priv->tx_rate = 2;
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break;
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case 11000000:
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priv->tx_rate = 3;
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break;
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default:
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return -EINVAL;
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}
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}
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}
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} else {
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vwrq->fixed = 1;
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switch (priv->tx_rate) {
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case 0: vwrq->value = 1000000; break;
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case 1: vwrq->value = 2000000; break;
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case 2: vwrq->value = 5500000; break;
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case 3: vwrq->value = 11000000; break;
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case 0:
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vwrq->value = 1000000;
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break;
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case 1:
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vwrq->value = 2000000;
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break;
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case 2:
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vwrq->value = 5500000;
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break;
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case 3:
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vwrq->value = 11000000;
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break;
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}
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}
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return 0;
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@ -2576,8 +2620,7 @@ static const struct iw_priv_args atmel_private_args[] = {
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},
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};
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static const struct iw_handler_def atmel_handler_def =
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{
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static const struct iw_handler_def atmel_handler_def = {
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.num_standard = ARRAY_SIZE(atmel_handler),
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.num_private = ARRAY_SIZE(atmel_private_handler),
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.num_private_args = ARRAY_SIZE(atmel_private_args),
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@ -3474,7 +3517,6 @@ static void atmel_command_irq(struct atmel_private *priv)
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return;
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switch (command) {
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case CMD_Start:
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if (status == CMD_STATUS_COMPLETE) {
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priv->station_was_associated = priv->station_is_associated;
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@ -3999,8 +4041,7 @@ static int reset_atmel_card(struct net_device *dev)
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else
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build_wep_mib(priv);
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if (old_state == STATION_STATE_READY)
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{
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if (old_state == STATION_STATE_READY) {
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union iwreq_data wrqu;
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wrqu.data.length = 0;
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