mfd: Remove wm8400 custom cache implementation
Save a useful amount of code by removing the custom cache implementation for wm8400 and using the regmap cache. Also simplify things by not separately reseting the CODEC registers, this is a sufficiently infrequent operation that we can simply invalidate the entire cache when this happens. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Mark Brown
Samuel Ortiz
parent
27757e8262
commit
879eed6826
2 changed files with 42 additions and 223 deletions
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@ -23,136 +23,16 @@
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#include <linux/regmap.h>
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#include <linux/slab.h>
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static struct {
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u16 readable; /* Mask of readable bits */
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u16 writable; /* Mask of writable bits */
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u16 vol; /* Mask of volatile bits */
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int is_codec; /* Register controlled by codec reset */
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u16 default_val; /* Value on reset */
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} reg_data[] = {
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
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{ 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
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{ 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
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{ 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
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{ 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
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{ 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
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{ 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
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{ 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
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{ 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
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{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
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{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
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{ 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
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{ 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
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{ 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
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{ 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
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{ 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
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{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
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{ 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
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{ 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
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{ 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
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{ 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
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{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
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{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
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{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
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{ 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
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{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
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{ 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
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{ 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
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{ 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
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{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
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{ 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
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{ 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
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{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
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{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
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{ 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
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{ 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
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{ 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
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{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
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{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
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{ 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
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{ 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
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};
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static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
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static bool wm8400_volatile(struct device *dev, unsigned int reg)
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{
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int i, ret = 0;
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BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
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/* If there are any volatile reads then read back the entire block */
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for (i = reg; i < reg + num_regs; i++)
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if (reg_data[i].vol) {
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ret = regmap_bulk_read(wm8400->regmap, reg, dest,
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num_regs);
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return ret;
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}
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/* Otherwise use the cache */
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memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
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return 0;
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}
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static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
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u16 *src)
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{
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int ret, i;
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BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
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for (i = 0; i < num_regs; i++) {
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BUG_ON(!reg_data[reg + i].writable);
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wm8400->reg_cache[reg + i] = src[i];
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ret = regmap_write(wm8400->regmap, reg, src[i]);
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if (ret != 0)
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return ret;
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switch (reg) {
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case WM8400_INTERRUPT_STATUS_1:
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case WM8400_INTERRUPT_LEVELS:
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case WM8400_SHUTDOWN_REASON:
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return true;
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default:
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return false;
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}
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return 0;
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}
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/**
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@ -165,13 +45,12 @@ static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
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*/
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u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
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{
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u16 val;
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unsigned int val;
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int ret;
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mutex_lock(&wm8400->io_lock);
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wm8400_read(wm8400, reg, 1, &val);
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mutex_unlock(&wm8400->io_lock);
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ret = regmap_read(wm8400->regmap, reg, &val);
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if (ret < 0)
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return ret;
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return val;
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}
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@ -179,62 +58,8 @@ EXPORT_SYMBOL_GPL(wm8400_reg_read);
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int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
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{
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int ret;
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mutex_lock(&wm8400->io_lock);
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ret = wm8400_read(wm8400, reg, count, data);
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mutex_unlock(&wm8400->io_lock);
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return ret;
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return regmap_bulk_read(wm8400->regmap, reg, data, count);
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}
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EXPORT_SYMBOL_GPL(wm8400_block_read);
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/**
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* wm8400_set_bits - Bitmask write
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*
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* @wm8400: Pointer to wm8400 control structure
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* @reg: Register to access
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* @mask: Mask of bits to change
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* @val: Value to set for masked bits
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*/
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int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
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{
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u16 tmp;
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int ret;
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mutex_lock(&wm8400->io_lock);
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ret = wm8400_read(wm8400, reg, 1, &tmp);
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tmp = (tmp & ~mask) | val;
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if (ret == 0)
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ret = wm8400_write(wm8400, reg, 1, &tmp);
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mutex_unlock(&wm8400->io_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8400_set_bits);
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/**
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* wm8400_reset_codec_reg_cache - Reset cached codec registers to
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* their default values.
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*/
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void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
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{
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int i;
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mutex_lock(&wm8400->io_lock);
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/* Reset all codec registers to their initial value */
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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if (reg_data[i].is_codec)
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wm8400->reg_cache[i] = reg_data[i].default_val;
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mutex_unlock(&wm8400->io_lock);
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}
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EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
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static int wm8400_register_codec(struct wm8400 *wm8400)
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{
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@ -257,44 +82,24 @@ static int wm8400_register_codec(struct wm8400 *wm8400)
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static int wm8400_init(struct wm8400 *wm8400,
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struct wm8400_platform_data *pdata)
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{
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u16 reg;
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int ret, i;
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mutex_init(&wm8400->io_lock);
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unsigned int reg;
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int ret;
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dev_set_drvdata(wm8400->dev, wm8400);
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/* Check that this is actually a WM8400 */
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ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, &i);
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ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, ®);
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if (ret != 0) {
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dev_err(wm8400->dev, "Chip ID register read failed\n");
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return -EIO;
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}
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if (i != reg_data[WM8400_RESET_ID].default_val) {
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dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n", i);
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if (reg != 0x6172) {
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dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
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reg);
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return -ENODEV;
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}
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/* We don't know what state the hardware is in and since this
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* is a PMIC we can't reset it safely so initialise the register
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* cache from the hardware.
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*/
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ret = regmap_raw_read(wm8400->regmap, 0, wm8400->reg_cache,
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ARRAY_SIZE(wm8400->reg_cache));
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if (ret != 0) {
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dev_err(wm8400->dev, "Register cache read failed\n");
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return -EIO;
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}
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
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/* If the codec is in reset use hard coded values */
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if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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if (reg_data[i].is_codec)
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wm8400->reg_cache[i] = reg_data[i].default_val;
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ret = wm8400_read(wm8400, WM8400_ID, 1, ®);
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ret = regmap_read(wm8400->regmap, WM8400_ID, ®);
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if (ret != 0) {
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dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
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return ret;
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@ -334,8 +139,22 @@ static const struct regmap_config wm8400_regmap_config = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = WM8400_REGISTER_COUNT - 1,
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.volatile_reg = wm8400_volatile,
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.cache_type = REGCACHE_RBTREE,
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};
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/**
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* wm8400_reset_codec_reg_cache - Reset cached codec registers to
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* their default values.
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*/
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void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
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{
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regmap_reinit_cache(wm8400->regmap, &wm8400_regmap_config);
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}
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EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
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#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
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static int wm8400_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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@ -24,19 +24,14 @@
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#include <linux/mfd/wm8400.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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struct regmap;
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#include <linux/regmap.h>
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#define WM8400_REGISTER_COUNT 0x55
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struct wm8400 {
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struct device *dev;
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struct mutex io_lock;
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struct regmap *regmap;
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u16 reg_cache[WM8400_REGISTER_COUNT];
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struct platform_device regulators[6];
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};
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@ -930,6 +925,11 @@ struct wm8400 {
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u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg);
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int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data);
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int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val);
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static inline int wm8400_set_bits(struct wm8400 *wm8400, u8 reg,
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u16 mask, u16 val)
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{
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return regmap_update_bits(wm8400->regmap, reg, mask, val);
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}
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#endif
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