KVM: PPC: bookehv: remove negation for CONFIG_64BIT
Instead if doing #ifndef CONFIG_64BIT ... #else ... #endif we should rather do #ifdef CONFIG_64BIT ... #else ... #endif which is a lot easier to read. Change the bookehv implementation to stick with this rule. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
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1 changed files with 12 additions and 12 deletions
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@ -99,10 +99,10 @@
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.endif
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.endif
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oris r8, r6, MSR_CE@h
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oris r8, r6, MSR_CE@h
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#ifndef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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stw r6, (VCPU_SHARED_MSR + 4)(r11)
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#else
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std r6, (VCPU_SHARED_MSR)(r11)
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std r6, (VCPU_SHARED_MSR)(r11)
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#else
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stw r6, (VCPU_SHARED_MSR + 4)(r11)
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#endif
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#endif
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ori r8, r8, MSR_ME | MSR_RI
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ori r8, r8, MSR_ME | MSR_RI
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PPC_STL r5, VCPU_PC(r4)
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PPC_STL r5, VCPU_PC(r4)
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@ -344,10 +344,10 @@ _GLOBAL(kvmppc_resume_host)
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stw r5, VCPU_SHARED_MAS0(r11)
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stw r5, VCPU_SHARED_MAS0(r11)
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mfspr r7, SPRN_MAS2
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mfspr r7, SPRN_MAS2
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stw r6, VCPU_SHARED_MAS1(r11)
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stw r6, VCPU_SHARED_MAS1(r11)
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#ifndef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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stw r7, (VCPU_SHARED_MAS2 + 4)(r11)
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#else
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std r7, (VCPU_SHARED_MAS2)(r11)
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std r7, (VCPU_SHARED_MAS2)(r11)
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#else
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stw r7, (VCPU_SHARED_MAS2 + 4)(r11)
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#endif
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#endif
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mfspr r5, SPRN_MAS3
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mfspr r5, SPRN_MAS3
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mfspr r6, SPRN_MAS4
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mfspr r6, SPRN_MAS4
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@ -530,10 +530,10 @@ lightweight_exit:
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stw r3, VCPU_HOST_MAS6(r4)
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stw r3, VCPU_HOST_MAS6(r4)
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lwz r3, VCPU_SHARED_MAS0(r11)
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lwz r3, VCPU_SHARED_MAS0(r11)
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lwz r5, VCPU_SHARED_MAS1(r11)
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lwz r5, VCPU_SHARED_MAS1(r11)
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#ifndef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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lwz r6, (VCPU_SHARED_MAS2 + 4)(r11)
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#else
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ld r6, (VCPU_SHARED_MAS2)(r11)
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ld r6, (VCPU_SHARED_MAS2)(r11)
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#else
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lwz r6, (VCPU_SHARED_MAS2 + 4)(r11)
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#endif
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#endif
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lwz r7, VCPU_SHARED_MAS7_3+4(r11)
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lwz r7, VCPU_SHARED_MAS7_3+4(r11)
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lwz r8, VCPU_SHARED_MAS4(r11)
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lwz r8, VCPU_SHARED_MAS4(r11)
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@ -572,10 +572,10 @@ lightweight_exit:
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PPC_LL r6, VCPU_CTR(r4)
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PPC_LL r6, VCPU_CTR(r4)
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PPC_LL r7, VCPU_CR(r4)
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PPC_LL r7, VCPU_CR(r4)
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PPC_LL r8, VCPU_PC(r4)
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PPC_LL r8, VCPU_PC(r4)
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#ifndef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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lwz r9, (VCPU_SHARED_MSR + 4)(r11)
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#else
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ld r9, (VCPU_SHARED_MSR)(r11)
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ld r9, (VCPU_SHARED_MSR)(r11)
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#else
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lwz r9, (VCPU_SHARED_MSR + 4)(r11)
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#endif
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#endif
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PPC_LL r0, VCPU_GPR(r0)(r4)
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PPC_LL r0, VCPU_GPR(r0)(r4)
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PPC_LL r1, VCPU_GPR(r1)(r4)
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PPC_LL r1, VCPU_GPR(r1)(r4)
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