MIPS: BCM63xx: Replace irq dispatch code with a generic version
The generic version uses a variable length of u32 registers instead of u32/u64. This allows easier support for "wider" registers without having to rewrite everything. This "generic" version is as fast as the old version in the best case (i == next set bit), and twice as fast in the worst case in 64 bits. Using a macro was chosen over a (forced) inline version because gcc generated more compact code with the macro. The change from (signed) int to unsigned int for i and to_call was intentional as the value can be only between 0 and (width - 1) anyway, and allowed gcc to optimise the code a bit further. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7316/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 56 additions and 74 deletions
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@ -51,47 +51,65 @@ static inline void handle_internal(int intbit)
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* will resume the loop where it ended the last time we left this
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* function.
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*/
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static void __dispatch_internal_32(void)
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{
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u32 pending;
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static int i;
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pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr);
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if (!pending)
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return ;
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while (1) {
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int to_call = i;
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i = (i + 1) & 0x1f;
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if (pending & (1 << to_call)) {
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handle_internal(to_call);
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break;
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}
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}
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#define BUILD_IPIC_INTERNAL(width) \
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void __dispatch_internal_##width(void) \
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{ \
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u32 pending[width / 32]; \
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unsigned int src, tgt; \
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bool irqs_pending = false; \
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static unsigned int i; \
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\
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/* read registers in reverse order */ \
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for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
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u32 val; \
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\
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val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \
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val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \
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pending[--tgt] = val; \
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\
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if (val) \
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irqs_pending = true; \
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} \
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\
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if (!irqs_pending) \
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return; \
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\
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while (1) { \
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unsigned int to_call = i; \
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\
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i = (i + 1) & (width - 1); \
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if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
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handle_internal(to_call); \
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break; \
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} \
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} \
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} \
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\
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static void __internal_irq_mask_##width(unsigned int irq) \
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{ \
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u32 val; \
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unsigned reg = (irq / 32) ^ (width/32 - 1); \
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unsigned bit = irq & 0x1f; \
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\
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val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
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val &= ~(1 << bit); \
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bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
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} \
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\
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static void __internal_irq_unmask_##width(unsigned int irq) \
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{ \
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u32 val; \
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unsigned reg = (irq / 32) ^ (width/32 - 1); \
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unsigned bit = irq & 0x1f; \
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\
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val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
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val |= (1 << bit); \
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bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
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}
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static void __dispatch_internal_64(void)
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{
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u64 pending;
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static int i;
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pending = bcm_readq(irq_stat_addr) & bcm_readq(irq_mask_addr);
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if (!pending)
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return ;
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while (1) {
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int to_call = i;
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i = (i + 1) & 0x3f;
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if (pending & (1ull << to_call)) {
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handle_internal(to_call);
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break;
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}
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}
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}
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BUILD_IPIC_INTERNAL(32);
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BUILD_IPIC_INTERNAL(64);
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asmlinkage void plat_irq_dispatch(void)
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{
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@ -128,42 +146,6 @@ asmlinkage void plat_irq_dispatch(void)
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* internal IRQs operations: only mask/unmask on PERF irq mask
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* register.
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*/
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static void __internal_irq_mask_32(unsigned int irq)
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{
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u32 mask;
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mask = bcm_readl(irq_mask_addr);
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mask &= ~(1 << irq);
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bcm_writel(mask, irq_mask_addr);
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}
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static void __internal_irq_mask_64(unsigned int irq)
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{
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u64 mask;
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mask = bcm_readq(irq_mask_addr);
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mask &= ~(1ull << irq);
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bcm_writeq(mask, irq_mask_addr);
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}
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static void __internal_irq_unmask_32(unsigned int irq)
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{
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u32 mask;
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mask = bcm_readl(irq_mask_addr);
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mask |= (1 << irq);
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bcm_writel(mask, irq_mask_addr);
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}
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static void __internal_irq_unmask_64(unsigned int irq)
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{
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u64 mask;
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mask = bcm_readq(irq_mask_addr);
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mask |= (1ull << irq);
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bcm_writeq(mask, irq_mask_addr);
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}
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static void bcm63xx_internal_irq_mask(struct irq_data *d)
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{
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internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
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