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x86: cacheline_align tss_struct

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The manual padding to align on cacheline size only worked in 32 bit
In 64 bit the structure was not aligned and contained wasted space.

use the compiler ____cachline_aligned to save space & properly align
this structure.

x86_64_default size goes from 9136 -> 8960
x86_64_AMD     size goes from 9136 -> 8896

built & running on 2.6.26-rc8.

Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Richard Kennedy 2008-07-04 13:56:16 +01:00 committed by Ingo Molnar
parent 95c60b08c6
commit 84e65b0a84
1 changed files with 1 additions and 5 deletions
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6
include/asm-x86/processor.h
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@ -262,16 +262,12 @@ struct tss_struct {
unsigned long io_bitmap_max;
struct thread_struct *io_bitmap_owner;
/*
* Pad the TSS to be cacheline-aligned (size is 0x100):
*/
unsigned long __cacheline_filler[35];
/*
* .. and then another 0x100 bytes for the emergency kernel stack:
*/
unsigned long stack[64];
} __attribute__((packed));
} ____cacheline_aligned;
DECLARE_PER_CPU(struct tss_struct, init_tss);