dmaengine: fsl-edma: add PM suspend/resume support
This add power management suspend/resume support for the fsl-edma driver. eDMA acted as a basic function used by others. What it needs to do is the two steps below to support power management. In fsl_edma_suspend_late: Check whether the DMA chan is idle, if it is not idle disable DMA request. In fsl_edma_resume_early: Enable the eDMA and wait for being used. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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f0579c8cea
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82d149b86d
1 changed files with 82 additions and 3 deletions
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@ -116,6 +116,10 @@
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)
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enum fsl_edma_pm_state {
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RUNNING = 0,
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SUSPENDED,
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};
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struct fsl_edma_hw_tcd {
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__le32 saddr;
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@ -147,6 +151,9 @@ struct fsl_edma_slave_config {
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struct fsl_edma_chan {
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struct virt_dma_chan vchan;
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enum dma_status status;
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enum fsl_edma_pm_state pm_state;
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bool idle;
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u32 slave_id;
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struct fsl_edma_engine *edma;
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struct fsl_edma_desc *edesc;
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struct fsl_edma_slave_config fsc;
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@ -298,6 +305,7 @@ static int fsl_edma_terminate_all(struct dma_chan *chan)
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spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
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fsl_edma_disable_request(fsl_chan);
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fsl_chan->edesc = NULL;
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fsl_chan->idle = true;
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vchan_get_all_descriptors(&fsl_chan->vchan, &head);
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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vchan_dma_desc_free_list(&fsl_chan->vchan, &head);
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@ -313,6 +321,7 @@ static int fsl_edma_pause(struct dma_chan *chan)
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if (fsl_chan->edesc) {
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fsl_edma_disable_request(fsl_chan);
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fsl_chan->status = DMA_PAUSED;
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fsl_chan->idle = true;
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}
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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return 0;
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@ -327,6 +336,7 @@ static int fsl_edma_resume(struct dma_chan *chan)
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if (fsl_chan->edesc) {
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fsl_edma_enable_request(fsl_chan);
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fsl_chan->status = DMA_IN_PROGRESS;
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fsl_chan->idle = false;
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}
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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return 0;
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@ -648,6 +658,7 @@ static void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan)
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fsl_edma_set_tcd_regs(fsl_chan, fsl_chan->edesc->tcd[0].vtcd);
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fsl_edma_enable_request(fsl_chan);
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fsl_chan->status = DMA_IN_PROGRESS;
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fsl_chan->idle = false;
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}
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static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id)
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@ -676,6 +687,7 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id)
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vchan_cookie_complete(&fsl_chan->edesc->vdesc);
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fsl_chan->edesc = NULL;
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fsl_chan->status = DMA_COMPLETE;
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fsl_chan->idle = true;
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} else {
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vchan_cyclic_callback(&fsl_chan->edesc->vdesc);
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}
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@ -704,6 +716,7 @@ static irqreturn_t fsl_edma_err_handler(int irq, void *dev_id)
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edma_writeb(fsl_edma, EDMA_CERR_CERR(ch),
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fsl_edma->membase + EDMA_CERR);
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fsl_edma->chans[ch].status = DMA_ERROR;
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fsl_edma->chans[ch].idle = true;
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}
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}
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return IRQ_HANDLED;
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@ -724,6 +737,12 @@ static void fsl_edma_issue_pending(struct dma_chan *chan)
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spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
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if (unlikely(fsl_chan->pm_state != RUNNING)) {
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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/* cannot submit due to suspend */
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return;
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}
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if (vchan_issue_pending(&fsl_chan->vchan) && !fsl_chan->edesc)
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fsl_edma_xfer_desc(fsl_chan);
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@ -735,6 +754,7 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec,
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{
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struct fsl_edma_engine *fsl_edma = ofdma->of_dma_data;
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struct dma_chan *chan, *_chan;
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struct fsl_edma_chan *fsl_chan;
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unsigned long chans_per_mux = fsl_edma->n_chans / DMAMUX_NR;
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if (dma_spec->args_count != 2)
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@ -748,8 +768,10 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec,
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chan = dma_get_slave_channel(chan);
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if (chan) {
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chan->device->privatecnt++;
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fsl_edma_chan_mux(to_fsl_edma_chan(chan),
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dma_spec->args[1], true);
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fsl_chan = to_fsl_edma_chan(chan);
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fsl_chan->slave_id = dma_spec->args[1];
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fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id,
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true);
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mutex_unlock(&fsl_edma->fsl_edma_mutex);
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return chan;
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}
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@ -888,7 +910,9 @@ static int fsl_edma_probe(struct platform_device *pdev)
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struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i];
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fsl_chan->edma = fsl_edma;
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fsl_chan->pm_state = RUNNING;
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fsl_chan->slave_id = 0;
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fsl_chan->idle = true;
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fsl_chan->vchan.desc_free = fsl_edma_free_desc;
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vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);
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@ -959,6 +983,60 @@ static int fsl_edma_remove(struct platform_device *pdev)
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return 0;
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}
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static int fsl_edma_suspend_late(struct device *dev)
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{
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struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev);
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struct fsl_edma_chan *fsl_chan;
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unsigned long flags;
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int i;
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for (i = 0; i < fsl_edma->n_chans; i++) {
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fsl_chan = &fsl_edma->chans[i];
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spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
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/* Make sure chan is idle or will force disable. */
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if (unlikely(!fsl_chan->idle)) {
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dev_warn(dev, "WARN: There is non-idle channel.");
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fsl_edma_disable_request(fsl_chan);
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fsl_edma_chan_mux(fsl_chan, 0, false);
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}
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fsl_chan->pm_state = SUSPENDED;
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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}
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return 0;
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}
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static int fsl_edma_resume_early(struct device *dev)
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{
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struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev);
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struct fsl_edma_chan *fsl_chan;
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int i;
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for (i = 0; i < fsl_edma->n_chans; i++) {
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fsl_chan = &fsl_edma->chans[i];
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fsl_chan->pm_state = RUNNING;
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edma_writew(fsl_edma, 0x0, fsl_edma->membase + EDMA_TCD_CSR(i));
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if (fsl_chan->slave_id != 0)
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fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true);
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}
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edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA,
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fsl_edma->membase + EDMA_CR);
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return 0;
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}
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/*
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* eDMA provides the service to others, so it should be suspend late
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* and resume early. When eDMA suspend, all of the clients should stop
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* the DMA data transmission and let the channel idle.
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*/
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static const struct dev_pm_ops fsl_edma_pm_ops = {
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.suspend_late = fsl_edma_suspend_late,
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.resume_early = fsl_edma_resume_early,
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};
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static const struct of_device_id fsl_edma_dt_ids[] = {
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{ .compatible = "fsl,vf610-edma", },
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{ /* sentinel */ }
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@ -969,6 +1047,7 @@ static struct platform_driver fsl_edma_driver = {
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.driver = {
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.name = "fsl-edma",
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.of_match_table = fsl_edma_dt_ids,
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.pm = &fsl_edma_pm_ops,
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},
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.probe = fsl_edma_probe,
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.remove = fsl_edma_remove,
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