regulator: bd71837: Disable voltage monitoring for LDO3/4
There is a HW quirk in BD71837. The shutdown sequence timings for bucks/LDOs which are enabled via register interface are changed. At PMIC poweroff the voltage for BUCK6/7 is cut immediately at the beginning of shut-down sequence. This causes LDO5/6 voltage monitoring to detect under voltage and force PMIC to emergency state instead of poweroff. Disable voltage monitoring for LDO5 and LDO6 at probe to avoid this. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
This commit is contained in:
parent
5b394b2ddf
commit
823f18f8b8
2 changed files with 49 additions and 3 deletions
|
@ -569,6 +569,25 @@ static int bd71837_probe(struct platform_device *pdev)
|
|||
BD71837_REG_REGLOCK);
|
||||
}
|
||||
|
||||
/*
|
||||
* There is a HW quirk in BD71837. The shutdown sequence timings for
|
||||
* bucks/LDOs which are controlled via register interface are changed.
|
||||
* At PMIC poweroff the voltage for BUCK6/7 is cut immediately at the
|
||||
* beginning of shut-down sequence. As bucks 6 and 7 are parent
|
||||
* supplies for LDO5 and LDO6 - this causes LDO5/6 voltage
|
||||
* monitoring to errorneously detect under voltage and force PMIC to
|
||||
* emergency state instead of poweroff. In order to avoid this we
|
||||
* disable voltage monitoring for LDO5 and LDO6
|
||||
*/
|
||||
err = regmap_update_bits(pmic->mfd->regmap, BD718XX_REG_MVRFLTMASK2,
|
||||
BD718XX_LDO5_VRMON80 | BD718XX_LDO6_VRMON80,
|
||||
BD718XX_LDO5_VRMON80 | BD718XX_LDO6_VRMON80);
|
||||
if (err) {
|
||||
dev_err(&pmic->pdev->dev,
|
||||
"Failed to disable voltage monitoring\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pmic_regulator_inits); i++) {
|
||||
|
||||
struct regulator_desc *desc;
|
||||
|
|
|
@ -78,9 +78,9 @@ enum {
|
|||
BD71837_REG_TRANS_COND0 = 0x1F,
|
||||
BD71837_REG_TRANS_COND1 = 0x20,
|
||||
BD71837_REG_VRFAULTEN = 0x21,
|
||||
BD71837_REG_MVRFLTMASK0 = 0x22,
|
||||
BD71837_REG_MVRFLTMASK1 = 0x23,
|
||||
BD71837_REG_MVRFLTMASK2 = 0x24,
|
||||
BD718XX_REG_MVRFLTMASK0 = 0x22,
|
||||
BD718XX_REG_MVRFLTMASK1 = 0x23,
|
||||
BD718XX_REG_MVRFLTMASK2 = 0x24,
|
||||
BD71837_REG_RCVCFG = 0x25,
|
||||
BD71837_REG_RCVNUM = 0x26,
|
||||
BD71837_REG_PWRONCONFIG0 = 0x27,
|
||||
|
@ -159,6 +159,33 @@ enum {
|
|||
#define BUCK8_MASK 0x3F
|
||||
#define BUCK8_DEFAULT 0x1E
|
||||
|
||||
/* BD718XX Voltage monitoring masks */
|
||||
#define BD718XX_BUCK1_VRMON80 0x1
|
||||
#define BD718XX_BUCK1_VRMON130 0x2
|
||||
#define BD718XX_BUCK2_VRMON80 0x4
|
||||
#define BD718XX_BUCK2_VRMON130 0x8
|
||||
#define BD718XX_1ST_NODVS_BUCK_VRMON80 0x1
|
||||
#define BD718XX_1ST_NODVS_BUCK_VRMON130 0x2
|
||||
#define BD718XX_2ND_NODVS_BUCK_VRMON80 0x4
|
||||
#define BD718XX_2ND_NODVS_BUCK_VRMON130 0x8
|
||||
#define BD718XX_3RD_NODVS_BUCK_VRMON80 0x10
|
||||
#define BD718XX_3RD_NODVS_BUCK_VRMON130 0x20
|
||||
#define BD718XX_4TH_NODVS_BUCK_VRMON80 0x40
|
||||
#define BD718XX_4TH_NODVS_BUCK_VRMON130 0x80
|
||||
#define BD718XX_LDO1_VRMON80 0x1
|
||||
#define BD718XX_LDO2_VRMON80 0x2
|
||||
#define BD718XX_LDO3_VRMON80 0x4
|
||||
#define BD718XX_LDO4_VRMON80 0x8
|
||||
#define BD718XX_LDO5_VRMON80 0x10
|
||||
#define BD718XX_LDO6_VRMON80 0x20
|
||||
|
||||
/* BD71837 specific voltage monitoring masks */
|
||||
#define BD71837_BUCK3_VRMON80 0x10
|
||||
#define BD71837_BUCK3_VRMON130 0x20
|
||||
#define BD71837_BUCK4_VRMON80 0x40
|
||||
#define BD71837_BUCK4_VRMON130 0x80
|
||||
#define BD71837_LDO7_VRMON80 0x40
|
||||
|
||||
/* BD71837_REG_IRQ bits */
|
||||
#define IRQ_SWRST 0x40
|
||||
#define IRQ_PWRON_S 0x20
|
||||
|
|
Loading…
Reference in a new issue