ARM: ux500: remove pointless cache setup complexity
This cleans out non-DT cache setup (the ux500 is DT only), and sinks the l2cc base into the unlock function. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1 changed files with 4 additions and 14 deletions
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@ -7,17 +7,15 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "db8500-regs.h"
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#include "id.h"
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static void __iomem *l2x0_base;
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static int __init ux500_l2x0_unlock(void)
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{
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int i;
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void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE);
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/*
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* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
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@ -45,23 +43,15 @@ static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
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static int __init ux500_l2x0_init(void)
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{
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if (cpu_is_u8500_family() || cpu_is_ux540_family())
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l2x0_base = __io_address(U8500_L2CC_BASE);
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else
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/* Non-Ux500 platform */
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/* Multiplatform guard */
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if (!((cpu_is_u8500_family() || cpu_is_ux540_family())))
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return -ENODEV;
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/* Unlock before init */
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ux500_l2x0_unlock();
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outer_cache.write_sec = ux500_l2c310_write_sec;
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if (of_have_populated_dt())
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l2x0_of_init(0, ~0);
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else
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l2x0_init(l2x0_base, 0, ~0);
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l2x0_of_init(0, ~0);
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return 0;
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}
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early_initcall(ux500_l2x0_init);
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