mfd: stmpe: add pull up/down register offsets for STMPE
This adds the register offsets for pull up/down for the STMPE 1601, 1801 and 24xx expanders. This is used to bias GPIO lines and keypad lines. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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3 changed files with 9 additions and 0 deletions
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@ -519,6 +519,7 @@ static const u8 stmpe1601_regs[] = {
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[STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
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[STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
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[STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
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[STMPE_IDX_GPPUR_LSB] = STMPE1601_REG_GPIO_PU_LSB,
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[STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
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[STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
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[STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
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@ -667,6 +668,7 @@ static const u8 stmpe1801_regs[] = {
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[STMPE_IDX_GPDR_LSB] = STMPE1801_REG_GPIO_SET_DIR_LOW,
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[STMPE_IDX_GPRER_LSB] = STMPE1801_REG_GPIO_RE_LOW,
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[STMPE_IDX_GPFER_LSB] = STMPE1801_REG_GPIO_FE_LOW,
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[STMPE_IDX_GPPUR_LSB] = STMPE1801_REG_GPIO_PULL_UP_LOW,
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[STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
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[STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
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};
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@ -750,6 +752,8 @@ static const u8 stmpe24xx_regs[] = {
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[STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
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[STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
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[STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
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[STMPE_IDX_GPPUR_LSB] = STMPE24XX_REG_GPPUR_LSB,
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[STMPE_IDX_GPPDR_LSB] = STMPE24XX_REG_GPPDR_LSB,
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[STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
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[STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
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[STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
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@ -188,6 +188,7 @@ int stmpe_remove(struct stmpe *stmpe);
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#define STMPE1601_REG_GPIO_ED_MSB 0x8A
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#define STMPE1601_REG_GPIO_RE_LSB 0x8D
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#define STMPE1601_REG_GPIO_FE_LSB 0x8F
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#define STMPE1601_REG_GPIO_PU_LSB 0x91
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#define STMPE1601_REG_GPIO_AF_U_MSB 0x92
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#define STMPE1601_SYS_CTRL_ENABLE_GPIO (1 << 3)
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@ -276,6 +277,8 @@ int stmpe_remove(struct stmpe *stmpe);
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#define STMPE24XX_REG_GPEDR_MSB 0x8C
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#define STMPE24XX_REG_GPRER_LSB 0x91
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#define STMPE24XX_REG_GPFER_LSB 0x94
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#define STMPE24XX_REG_GPPUR_LSB 0x97
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#define STMPE24XX_REG_GPPDR_LSB 0x9a
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#define STMPE24XX_REG_GPAFR_U_MSB 0x9B
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#define STMPE24XX_SYS_CTRL_ENABLE_GPIO (1 << 3)
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@ -50,6 +50,8 @@ enum {
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STMPE_IDX_GPEDR_MSB,
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STMPE_IDX_GPRER_LSB,
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STMPE_IDX_GPFER_LSB,
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STMPE_IDX_GPPUR_LSB,
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STMPE_IDX_GPPDR_LSB,
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STMPE_IDX_GPAFR_U_MSB,
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STMPE_IDX_IEGPIOR_LSB,
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STMPE_IDX_ISGPIOR_LSB,
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