sfc: Treat all MAC registers as 128-bit
Although all the defined fields in these registers are within 32 bits, they are architecturally defined as 128-bit like most other Falcon registers. In particular, we must use efx_reado() to ensure proper locking when reading MD_STAT_REG. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2 changed files with 14 additions and 14 deletions
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@ -2042,18 +2042,18 @@ int falcon_dma_stats(struct efx_nic *efx, unsigned int done_offset)
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/* Wait for GMII access to complete */
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static int falcon_gmii_wait(struct efx_nic *efx)
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{
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efx_dword_t md_stat;
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efx_oword_t md_stat;
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int count;
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/* wait upto 50ms - taken max from datasheet */
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for (count = 0; count < 5000; count++) {
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efx_readd(efx, &md_stat, FR_AB_MD_STAT);
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if (EFX_DWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) {
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if (EFX_DWORD_FIELD(md_stat, FRF_AB_MD_LNFL) != 0 ||
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EFX_DWORD_FIELD(md_stat, FRF_AB_MD_BSERR) != 0) {
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efx_reado(efx, &md_stat, FR_AB_MD_STAT);
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if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) {
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if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_LNFL) != 0 ||
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EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSERR) != 0) {
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EFX_ERR(efx, "error from GMII access "
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EFX_DWORD_FMT"\n",
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EFX_DWORD_VAL(md_stat));
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EFX_OWORD_FMT"\n",
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EFX_OWORD_VAL(md_stat));
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return -EIO;
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}
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return 0;
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@ -64,7 +64,7 @@ int falcon_reset_xaui(struct efx_nic *efx)
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int count;
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/* Start reset sequence */
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EFX_POPULATE_DWORD_1(reg, FRF_AB_XX_RST_XX_EN, 1);
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EFX_POPULATE_OWORD_1(reg, FRF_AB_XX_RST_XX_EN, 1);
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efx_writeo(efx, ®, FR_AB_XX_PWR_RST);
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/* Wait up to 10 ms for completion, then reinitialise */
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@ -146,14 +146,14 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx)
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bool rx_fc = !!(efx->link_state.fc & EFX_FC_RX);
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/* Configure MAC - cut-thru mode is hard wired on */
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EFX_POPULATE_DWORD_3(reg,
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EFX_POPULATE_OWORD_3(reg,
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FRF_AB_XM_RX_JUMBO_MODE, 1,
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FRF_AB_XM_TX_STAT_EN, 1,
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FRF_AB_XM_RX_STAT_EN, 1);
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efx_writeo(efx, ®, FR_AB_XM_GLB_CFG);
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/* Configure TX */
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EFX_POPULATE_DWORD_6(reg,
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EFX_POPULATE_OWORD_6(reg,
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FRF_AB_XM_TXEN, 1,
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FRF_AB_XM_TX_PRMBL, 1,
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FRF_AB_XM_AUTO_PAD, 1,
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@ -163,7 +163,7 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx)
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efx_writeo(efx, ®, FR_AB_XM_TX_CFG);
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/* Configure RX */
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EFX_POPULATE_DWORD_5(reg,
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EFX_POPULATE_OWORD_5(reg,
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FRF_AB_XM_RXEN, 1,
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FRF_AB_XM_AUTO_DEPAD, 0,
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FRF_AB_XM_ACPT_ALL_MCAST, 1,
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@ -173,14 +173,14 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx)
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/* Set frame length */
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max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
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EFX_POPULATE_DWORD_1(reg, FRF_AB_XM_MAX_RX_FRM_SIZE, max_frame_len);
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EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_MAX_RX_FRM_SIZE, max_frame_len);
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efx_writeo(efx, ®, FR_AB_XM_RX_PARAM);
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EFX_POPULATE_DWORD_2(reg,
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EFX_POPULATE_OWORD_2(reg,
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FRF_AB_XM_MAX_TX_FRM_SIZE, max_frame_len,
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FRF_AB_XM_TX_JUMBO_MODE, 1);
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efx_writeo(efx, ®, FR_AB_XM_TX_PARAM);
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EFX_POPULATE_DWORD_2(reg,
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EFX_POPULATE_OWORD_2(reg,
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FRF_AB_XM_PAUSE_TIME, 0xfffe, /* MAX PAUSE TIME */
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FRF_AB_XM_DIS_FCNTL, !rx_fc);
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efx_writeo(efx, ®, FR_AB_XM_FC);
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