arm64: dts: Add APM X-Gene PCIe 64-bit prefetchable window
Add a large window (up to 64GB) for X-Gene PCIe nodes to support devices that require huge BARs. Each X-Gene PCIe node will now have two memory windows: a 32-bit non-prefetchable window and a 64-bit prefetchable window. [bhelgaas: changelog] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
4ef299d7dd
commit
80bb3eda74
1 changed files with 14 additions and 9 deletions
|
@ -490,7 +490,8 @@
|
||||||
0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
||||||
reg-names = "csr", "cfg";
|
reg-names = "csr", "cfg";
|
||||||
ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
|
ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
|
||||||
0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
|
0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000 /* mem */
|
||||||
|
0x43000000 0xf0 0x00000000 0xf0 0x00000000 0x10 0x00000000>; /* mem */
|
||||||
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
||||||
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
||||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||||
|
@ -513,8 +514,9 @@
|
||||||
reg = < 0x00 0x1f2c0000 0x0 0x00010000 /* Controller registers */
|
reg = < 0x00 0x1f2c0000 0x0 0x00010000 /* Controller registers */
|
||||||
0xd0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
0xd0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
||||||
reg-names = "csr", "cfg";
|
reg-names = "csr", "cfg";
|
||||||
ranges = <0x01000000 0x0 0x00000000 0xd0 0x10000000 0x00 0x00010000 /* io */
|
ranges = <0x01000000 0x00 0x00000000 0xd0 0x10000000 0x00 0x00010000 /* io */
|
||||||
0x02000000 0x0 0x80000000 0xd1 0x80000000 0x00 0x80000000>; /* mem */
|
0x02000000 0x00 0x80000000 0xd1 0x80000000 0x00 0x80000000 /* mem */
|
||||||
|
0x43000000 0xd8 0x00000000 0xd8 0x00000000 0x08 0x00000000>; /* mem */
|
||||||
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
||||||
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
||||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||||
|
@ -537,8 +539,9 @@
|
||||||
reg = < 0x00 0x1f2d0000 0x0 0x00010000 /* Controller registers */
|
reg = < 0x00 0x1f2d0000 0x0 0x00010000 /* Controller registers */
|
||||||
0x90 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
0x90 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
||||||
reg-names = "csr", "cfg";
|
reg-names = "csr", "cfg";
|
||||||
ranges = <0x01000000 0x0 0x00000000 0x90 0x10000000 0x0 0x00010000 /* io */
|
ranges = <0x01000000 0x00 0x00000000 0x90 0x10000000 0x00 0x00010000 /* io */
|
||||||
0x02000000 0x0 0x80000000 0x91 0x80000000 0x0 0x80000000>; /* mem */
|
0x02000000 0x00 0x80000000 0x91 0x80000000 0x00 0x80000000 /* mem */
|
||||||
|
0x43000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; /* mem */
|
||||||
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
||||||
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
||||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||||
|
@ -561,8 +564,9 @@
|
||||||
reg = < 0x00 0x1f500000 0x0 0x00010000 /* Controller registers */
|
reg = < 0x00 0x1f500000 0x0 0x00010000 /* Controller registers */
|
||||||
0xa0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
0xa0 0xd0000000 0x0 0x00040000>; /* PCI config space */
|
||||||
reg-names = "csr", "cfg";
|
reg-names = "csr", "cfg";
|
||||||
ranges = <0x01000000 0x0 0x00000000 0xa0 0x10000000 0x0 0x00010000 /* io */
|
ranges = <0x01000000 0x00 0x00000000 0xa0 0x10000000 0x00 0x00010000 /* io */
|
||||||
0x02000000 0x0 0x80000000 0xa1 0x80000000 0x0 0x80000000>; /* mem */
|
0x02000000 0x00 0x80000000 0xa1 0x80000000 0x00 0x80000000 /* mem */
|
||||||
|
0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */
|
||||||
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
||||||
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
||||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||||
|
@ -585,8 +589,9 @@
|
||||||
reg = < 0x00 0x1f510000 0x0 0x00010000 /* Controller registers */
|
reg = < 0x00 0x1f510000 0x0 0x00010000 /* Controller registers */
|
||||||
0xc0 0xd0000000 0x0 0x00200000>; /* PCI config space */
|
0xc0 0xd0000000 0x0 0x00200000>; /* PCI config space */
|
||||||
reg-names = "csr", "cfg";
|
reg-names = "csr", "cfg";
|
||||||
ranges = <0x01000000 0x0 0x00000000 0xc0 0x10000000 0x0 0x00010000 /* io */
|
ranges = <0x01000000 0x00 0x00000000 0xc0 0x10000000 0x00 0x00010000 /* io */
|
||||||
0x02000000 0x0 0x80000000 0xc1 0x80000000 0x0 0x80000000>; /* mem */
|
0x02000000 0x00 0x80000000 0xc1 0x80000000 0x00 0x80000000 /* mem */
|
||||||
|
0x43000000 0xc8 0x00000000 0xc8 0x00000000 0x08 0x00000000>; /* mem */
|
||||||
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
|
||||||
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
|
||||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||||
|
|
Loading…
Reference in a new issue