[PATCH] FRV: Make the FRV arch work again

The attached patch implements a bunch of small changes to the FRV arch to
make it work again.

It deals with the following problems:

 (1) SEM_DEBUG should be SEMAPHORE_DEBUG.

 (2) The argument list to pcibios_penalize_isa_irq() has changed.

 (3) CONFIG_HIGHMEM can't be used directly in #if as it may not be defined.

 (4) page->private is no longer directly accessible.

 (5) linux/hardirq.h assumes asm/hardirq.h will include linux/irq.h

 (6) The IDE MMIO access functions are given pointers, not integers, and so
     get type casting errors.

 (7) __pa() is passed an explicit u64 type in drivers/char/mem.c, but that
     can't be cast directly to a pointer on a 32-bit platform.

 (8) SEMAPHORE_DEBUG should not be contingent on WAITQUEUE_DEBUG as that no
     longer exists.

 (9) PREEMPT_ACTIVE is too low a value.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
David Howells 2005-11-28 13:43:51 -08:00 committed by Linus Torvalds
parent c13cf856cb
commit 8080f23122
9 changed files with 15 additions and 14 deletions

View file

@ -20,7 +20,7 @@ struct sem_waiter {
struct task_struct *task;
};
#if SEM_DEBUG
#if SEMAPHORE_DEBUG
void semtrace(struct semaphore *sem, const char *str)
{
if (sem->debug)

View file

@ -60,7 +60,7 @@ void __init pcibios_fixup_irqs(void)
}
}
void __init pcibios_penalize_isa_irq(int irq, int active)
void __init pcibios_penalize_isa_irq(int irq)
{
}

View file

@ -108,7 +108,7 @@ void __init paging_init(void)
memset((void *) empty_zero_page, 0, PAGE_SIZE);
#if CONFIG_HIGHMEM
#ifdef CONFIG_HIGHMEM
if (num_physpages - num_mappedpages) {
pgd_t *pge;
pud_t *pue;

View file

@ -85,7 +85,7 @@ static inline void pgd_list_add(pgd_t *pgd)
struct page *page = virt_to_page(pgd);
page->index = (unsigned long) pgd_list;
if (pgd_list)
pgd_list->private = (unsigned long) &page->index;
set_page_private(pgd_list, (unsigned long) &page->index);
pgd_list = page;
set_page_private(page, (unsigned long)&pgd_list);
}
@ -94,10 +94,10 @@ static inline void pgd_list_del(pgd_t *pgd)
{
struct page *next, **pprev, *page = virt_to_page(pgd);
next = (struct page *) page->index;
pprev = (struct page **)page_private(page);
pprev = (struct page **) page_private(page);
*pprev = next;
if (next)
next->private = (unsigned long) pprev;
set_page_private(next, (unsigned long) pprev);
}
void pgd_ctor(void *pgd, kmem_cache_t *cache, unsigned long unused)

View file

@ -14,6 +14,7 @@
#include <linux/config.h>
#include <linux/threads.h>
#include <linux/irq.h>
typedef struct {
unsigned int __softirq_pending;

View file

@ -33,10 +33,10 @@
/*
* some bits needed for parts of the IDE subsystem to compile
*/
#define __ide_mm_insw(port, addr, n) insw(port, addr, n)
#define __ide_mm_insl(port, addr, n) insl(port, addr, n)
#define __ide_mm_outsw(port, addr, n) outsw(port, addr, n)
#define __ide_mm_outsl(port, addr, n) outsl(port, addr, n)
#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n)
#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n)
#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n)
#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n)
#endif /* __KERNEL__ */

View file

@ -47,8 +47,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
#define devmem_is_allowed(pfn) 1
#define __pa(vaddr) virt_to_phys((void *) vaddr)
#define __va(paddr) phys_to_virt((unsigned long) paddr)
#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
#define __va(paddr) phys_to_virt((unsigned long) (paddr))
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)

View file

@ -20,7 +20,7 @@
#include <linux/spinlock.h>
#include <linux/rwsem.h>
#define SEMAPHORE_DEBUG WAITQUEUE_DEBUG
#define SEMAPHORE_DEBUG 0
/*
* the semaphore definition

View file

@ -58,7 +58,7 @@ struct thread_info {
#endif
#define PREEMPT_ACTIVE 0x4000000
#define PREEMPT_ACTIVE 0x10000000
/*
* macros/functions for gaining access to the thread information structure