powerpc: Introduce ppc_pci_flags accessors
Currently there are a number of platforms that open code access to the ppc_pci_flags global variable. However, that variable is not present if CONFIG_PCI is not set, which can lead to a build break. This introduces a number of accessor functions that are defined to be empty in the case of CONFIG_PCI being disabled. The various platform files in the kernel are updated to use these. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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edc72ac4a0
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14 changed files with 42 additions and 18 deletions
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@ -13,7 +13,6 @@
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struct device_node;
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extern unsigned int ppc_pci_flags;
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enum {
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/* Force re-assigning all resources (ignore firmware
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* setup completely)
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@ -36,6 +35,31 @@ enum {
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/* ... except for domain 0 */
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PPC_PCI_COMPAT_DOMAIN_0 = 0x00000020,
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};
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#ifdef CONFIG_PCI
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extern unsigned int ppc_pci_flags;
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static inline void ppc_pci_set_flags(int flags)
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{
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ppc_pci_flags = flags;
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}
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static inline void ppc_pci_add_flags(int flags)
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{
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ppc_pci_flags |= flags;
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}
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static inline int ppc_pci_has_flag(int flag)
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{
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return (ppc_pci_flags & flag);
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}
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#else
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static inline void ppc_pci_set_flags(int flags) { }
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static inline void ppc_pci_add_flags(int flags) { }
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static inline int ppc_pci_has_flag(int flag)
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{
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return 0;
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}
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#endif
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/*
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@ -38,8 +38,8 @@ struct pci_dev;
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers (don't do that on ppc64 yet !)
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*/
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#define pcibios_assign_all_busses() (ppc_pci_flags & \
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PPC_PCI_REASSIGN_ALL_BUS)
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#define pcibios_assign_all_busses() \
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(ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
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#define pcibios_scan_all_fns(a, b) 0
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static inline void pcibios_set_master(struct pci_dev *dev)
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@ -100,7 +100,7 @@ static void __init ep405_setup_arch(void)
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/* Find & init the BCSR CPLD */
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ep405_init_bcsr();
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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}
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static int __init ep405_probe(void)
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@ -44,7 +44,7 @@ static int __init kilauea_probe(void)
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if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
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return 0;
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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return 1;
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}
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@ -61,7 +61,7 @@ static int __init ppc40x_probe(void)
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for (i = 0; i < ARRAY_SIZE(board); i++) {
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if (of_flat_dt_is_compatible(root, board[i])) {
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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return 1;
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}
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}
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@ -54,7 +54,7 @@ static int __init ebony_probe(void)
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if (!of_flat_dt_is_compatible(root, "ibm,ebony"))
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return 0;
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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return 1;
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}
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@ -69,7 +69,7 @@ static int __init ppc44x_probe(void)
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for (i = 0; i < ARRAY_SIZE(board); i++) {
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if (of_flat_dt_is_compatible(root, board[i])) {
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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return 1;
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}
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}
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@ -51,7 +51,7 @@ static int __init sam440ep_probe(void)
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if (!of_flat_dt_is_compatible(root, "acube,sam440ep"))
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return 0;
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ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
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return 1;
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}
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@ -375,7 +375,7 @@ mpc52xx_add_bridge(struct device_node *node)
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pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name);
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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if (of_address_to_resource(node, 0, &rsrc) != 0) {
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printk(KERN_ERR "Can't get %s resources\n", node->full_name);
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@ -53,7 +53,7 @@ static void __init pq2_pci_add_bridge(struct device_node *np)
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if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
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goto err;
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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hose = pcibios_alloc_controller(np);
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if (!hose)
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@ -199,7 +199,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
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printk ("RTAS supporting Pegasos OF not found, please upgrade"
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" your firmware\n");
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}
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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/* keep the reference to the root node */
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}
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@ -729,7 +729,7 @@ static void __init setup_bandit(struct pci_controller *hose,
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static int __init setup_uninorth(struct pci_controller *hose,
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struct resource *addr)
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{
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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has_uninorth = 1;
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hose->ops = ¯isc_pci_ops;
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hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
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@ -996,7 +996,7 @@ void __init pmac_pci_init(void)
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struct device_node *np, *root;
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struct device_node *ht = NULL;
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ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN;
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ppc_pci_set_flags(PPC_PCI_CAN_SKIP_ISA_ALIGN);
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root = of_find_node_by_path("/");
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if (root == NULL) {
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@ -1055,7 +1055,7 @@ void __init pmac_pci_init(void)
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* some offset between bus number and domains for now when we
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* assign all busses should help for now
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*/
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if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
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if (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
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pcibios_assign_bus_offset = 0x10;
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#endif
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}
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@ -187,7 +187,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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@ -300,7 +300,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
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" bus 0\n", dev->full_name);
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}
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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@ -57,7 +57,7 @@ void __init setup_grackle(struct pci_controller *hose)
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{
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setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
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if (machine_is_compatible("PowerMac1,1"))
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
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if (machine_is_compatible("AAPL,PowerBook1998"))
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grackle_set_loop_snoop(hose, 1);
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#if 0 /* Disabled for now, HW problems ??? */
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