Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6164/1: Add kto and kfrom to input operands list. ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6 ARM: 6165/1: trap overflows on highmem pages from kmap_atomic when debugging ARM: 6152/1: ux500 make it possible to disable localtimers [ARM] pxa/spitz: Correctly register WM8750 [ARM] pxa/palmtc: storage class should be before const qualifier ARM: 6146/1: sa1111: Prevent deadlock in resume path ARM: 6145/1: ux500 MTU clockrate correction ARM: 6144/1: TCM memory bug freeing bug ARM: VFP: Fix vfp_put_double() for d16-d31
This commit is contained in:
Linus Torvalds
commit
7c8d20d40f
20 changed files with 206 additions and 66 deletions
|
|
@ -951,8 +951,6 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
if (!save)
|
||||
return 0;
|
||||
|
||||
spin_lock_irqsave(&sachip->lock, flags);
|
||||
|
||||
/*
|
||||
* Ensure that the SA1111 is still here.
|
||||
* FIXME: shouldn't do this here.
|
||||
|
|
@ -969,6 +967,13 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
* First of all, wake up the chip.
|
||||
*/
|
||||
sa1111_wake(sachip);
|
||||
|
||||
/*
|
||||
* Only lock for write ops. Also, sa1111_wake must be called with
|
||||
* released spinlock!
|
||||
*/
|
||||
spin_lock_irqsave(&sachip->lock, flags);
|
||||
|
||||
sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
|
||||
sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,10 @@ void clk_disable(struct clk *clk)
|
|||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
/* We have a fixed clock alone, for now */
|
||||
static struct clk clk_24 = {
|
||||
.rate = 2400000,
|
||||
};
|
||||
|
||||
static struct clk clk_48 = {
|
||||
.rate = 48 * 1000 * 1000,
|
||||
};
|
||||
|
|
@ -50,6 +53,8 @@ static struct clk clk_default;
|
|||
}
|
||||
|
||||
static struct clk_lookup lookups[] = {
|
||||
CLK(&clk_24, "mtu0"),
|
||||
CLK(&clk_24, "mtu1"),
|
||||
CLK(&clk_48, "uart0"),
|
||||
CLK(&clk_48, "uart1"),
|
||||
CLK(&clk_default, "gpio.0"),
|
||||
|
|
@ -59,10 +64,8 @@ static struct clk_lookup lookups[] = {
|
|||
CLK(&clk_default, "rng"),
|
||||
};
|
||||
|
||||
static int __init clk_init(void)
|
||||
int __init clk_init(void)
|
||||
{
|
||||
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(clk_init);
|
||||
|
|
|
|||
|
|
@ -11,3 +11,5 @@
|
|||
struct clk {
|
||||
unsigned long rate;
|
||||
};
|
||||
|
||||
int __init clk_init(void);
|
||||
|
|
|
|||
|
|
@ -31,6 +31,8 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
||||
#define __MEM_4K_RESOURCE(x) \
|
||||
.res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
|
||||
|
||||
|
|
@ -143,6 +145,12 @@ void __init cpu8815_init_irq(void)
|
|||
/* This modified VIC cell has two register blocks, at 0 and 0x20 */
|
||||
vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0);
|
||||
vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0);
|
||||
|
||||
/*
|
||||
* Init clocks here so that they are available for system timer
|
||||
* initialization.
|
||||
*/
|
||||
clk_init();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -263,11 +263,11 @@ const struct matrix_keymap_data palmtc_keymap_data = {
|
|||
.keymap_size = ARRAY_SIZE(palmtc_matrix_keys),
|
||||
};
|
||||
|
||||
const static unsigned int palmtc_keypad_row_gpios[] = {
|
||||
static const unsigned int palmtc_keypad_row_gpios[] = {
|
||||
0, 9, 10, 11
|
||||
};
|
||||
|
||||
const static unsigned int palmtc_keypad_col_gpios[] = {
|
||||
static const unsigned int palmtc_keypad_col_gpios[] = {
|
||||
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -818,6 +818,9 @@ static struct i2c_board_info akita_i2c_board_info[] = {
|
|||
.type = "max7310",
|
||||
.addr = 0x18,
|
||||
.platform_data = &akita_ioexp,
|
||||
}, {
|
||||
.type = "wm8750",
|
||||
.addr = 0x1b,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -7,4 +7,5 @@ obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o
|
|||
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
|
||||
obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o
|
||||
obj-$(CONFIG_MACH_U5500) += board-u5500.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
|
||||
obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
|
||||
#include <asm/clkdev.h>
|
||||
|
||||
#include <plat/mtu.h>
|
||||
#include <mach/hardware.h>
|
||||
#include "clock.h"
|
||||
|
||||
|
|
@ -59,6 +60,9 @@
|
|||
#define PRCM_DMACLK_MGT 0x074
|
||||
#define PRCM_B2R2CLK_MGT 0x078
|
||||
#define PRCM_TVCLK_MGT 0x07C
|
||||
#define PRCM_TCR 0x1C8
|
||||
#define PRCM_TCR_STOPPED (1 << 16)
|
||||
#define PRCM_TCR_DOZE_MODE (1 << 17)
|
||||
#define PRCM_UNIPROCLK_MGT 0x278
|
||||
#define PRCM_SSPCLK_MGT 0x280
|
||||
#define PRCM_RNGCLK_MGT 0x284
|
||||
|
|
@ -120,10 +124,95 @@ void clk_disable(struct clk *clk)
|
|||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
/*
|
||||
* The MTU has a separate, rather complex muxing setup
|
||||
* with alternative parents (peripheral cluster or
|
||||
* ULP or fixed 32768 Hz) depending on settings
|
||||
*/
|
||||
static unsigned long clk_mtu_get_rate(struct clk *clk)
|
||||
{
|
||||
void __iomem *addr = __io_address(U8500_PRCMU_BASE)
|
||||
+ PRCM_TCR;
|
||||
u32 tcr = readl(addr);
|
||||
int mtu = (int) clk->data;
|
||||
/*
|
||||
* One of these is selected eventually
|
||||
* TODO: Replace the constant with a reference
|
||||
* to the ULP source once this is modeled.
|
||||
*/
|
||||
unsigned long clk32k = 32768;
|
||||
unsigned long mturate;
|
||||
unsigned long retclk;
|
||||
|
||||
/* Get the rate from the parent as a default */
|
||||
if (clk->parent_periph)
|
||||
mturate = clk_get_rate(clk->parent_periph);
|
||||
else if (clk->parent_cluster)
|
||||
mturate = clk_get_rate(clk->parent_cluster);
|
||||
else
|
||||
/* We need to be connected SOMEWHERE */
|
||||
BUG();
|
||||
|
||||
/*
|
||||
* Are we in doze mode?
|
||||
* In this mode the parent peripheral or the fixed 32768 Hz
|
||||
* clock is fed into the block.
|
||||
*/
|
||||
if (!(tcr & PRCM_TCR_DOZE_MODE)) {
|
||||
/*
|
||||
* Here we're using the clock input from the APE ULP
|
||||
* clock domain. But first: are the timers stopped?
|
||||
*/
|
||||
if (tcr & PRCM_TCR_STOPPED) {
|
||||
clk32k = 0;
|
||||
mturate = 0;
|
||||
} else {
|
||||
/* Else default mode: 0 and 2.4 MHz */
|
||||
clk32k = 0;
|
||||
if (cpu_is_u5500())
|
||||
/* DB5500 divides by 8 */
|
||||
mturate /= 8;
|
||||
else if (cpu_is_u8500ed()) {
|
||||
/*
|
||||
* This clocking setting must not be used
|
||||
* in the ED chip, it is simply not
|
||||
* connected anywhere!
|
||||
*/
|
||||
mturate = 0;
|
||||
BUG();
|
||||
} else
|
||||
/*
|
||||
* In this mode the ulp38m4 clock is divided
|
||||
* by a factor 16, on the DB8500 typically
|
||||
* 38400000 / 16 ~ 2.4 MHz.
|
||||
* TODO: Replace the constant with a reference
|
||||
* to the ULP source once this is modeled.
|
||||
*/
|
||||
mturate = 38400000 / 16;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return the clock selected for this MTU */
|
||||
if (tcr & (1 << mtu))
|
||||
retclk = clk32k;
|
||||
else
|
||||
retclk = mturate;
|
||||
|
||||
pr_info("MTU%d clock rate: %lu Hz\n", mtu, retclk);
|
||||
return retclk;
|
||||
}
|
||||
|
||||
unsigned long clk_get_rate(struct clk *clk)
|
||||
{
|
||||
unsigned long rate;
|
||||
|
||||
/*
|
||||
* If there is a custom getrate callback for this clock,
|
||||
* it will take precedence.
|
||||
*/
|
||||
if (clk->get_rate)
|
||||
return clk->get_rate(clk);
|
||||
|
||||
if (clk->ops && clk->ops->get_rate)
|
||||
return clk->ops->get_rate(clk);
|
||||
|
||||
|
|
@ -341,8 +430,9 @@ static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL);
|
|||
|
||||
/* Peripheral Cluster #6 */
|
||||
|
||||
static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL);
|
||||
static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL);
|
||||
/* MTU ID in data */
|
||||
static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1);
|
||||
static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0);
|
||||
static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL);
|
||||
static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL);
|
||||
static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL);
|
||||
|
|
@ -357,8 +447,9 @@ static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk);
|
|||
/* Peripheral Cluster #7 */
|
||||
|
||||
static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL);
|
||||
static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL);
|
||||
static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL);
|
||||
/* MTU ID in data */
|
||||
static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1);
|
||||
static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
|
||||
static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
|
||||
static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
|
||||
|
||||
|
|
@ -503,15 +594,17 @@ static struct clk_lookup u8500_v1_clks[] = {
|
|||
CLK(uiccclk, "uicc", NULL),
|
||||
};
|
||||
|
||||
static int __init clk_init(void)
|
||||
int __init clk_init(void)
|
||||
{
|
||||
if (cpu_is_u8500ed()) {
|
||||
clk_prcmu_ops.enable = clk_prcmu_ed_enable;
|
||||
clk_prcmu_ops.disable = clk_prcmu_ed_disable;
|
||||
clk_per6clk.rate = 100000000;
|
||||
} else if (cpu_is_u5500()) {
|
||||
/* Clock tree for U5500 not implemented yet */
|
||||
clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
|
||||
clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
|
||||
clk_per6clk.rate = 26000000;
|
||||
}
|
||||
|
||||
clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks));
|
||||
|
|
@ -522,4 +615,3 @@ static int __init clk_init(void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(clk_init);
|
||||
|
|
|
|||
|
|
@ -28,6 +28,9 @@ struct clkops {
|
|||
* @ops: pointer to clkops struct used to control this clock
|
||||
* @name: name, for debugging
|
||||
* @enabled: refcount. positive if enabled, zero if disabled
|
||||
* @get_rate: custom callback for getting the clock rate
|
||||
* @data: custom per-clock data for example for the get_rate
|
||||
* callback
|
||||
* @rate: fixed rate for clocks which don't implement
|
||||
* ops->getrate
|
||||
* @prcmu_cg_off: address offset of the combined enable/disable register
|
||||
|
|
@ -67,6 +70,8 @@ struct clk {
|
|||
const struct clkops *ops;
|
||||
const char *name;
|
||||
unsigned int enabled;
|
||||
unsigned long (*get_rate)(struct clk *);
|
||||
void *data;
|
||||
|
||||
unsigned long rate;
|
||||
struct list_head list;
|
||||
|
|
@ -117,9 +122,26 @@ struct clk clk_##_name = { \
|
|||
.parent_periph = _kernclk \
|
||||
}
|
||||
|
||||
#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
|
||||
struct clk clk_##_name = { \
|
||||
.name = #_name, \
|
||||
.ops = &clk_prcc_ops, \
|
||||
.cluster = _pclust, \
|
||||
.prcc_bus = _bus_en, \
|
||||
.prcc_kernel = _kernel_en, \
|
||||
.parent_cluster = &clk_per##_pclust##clk, \
|
||||
.parent_periph = _kernclk, \
|
||||
.get_rate = _callback, \
|
||||
.data = (void *) _data \
|
||||
}
|
||||
|
||||
|
||||
#define CLK(_clk, _devname, _conname) \
|
||||
{ \
|
||||
.clk = &clk_##_clk, \
|
||||
.dev_id = _devname, \
|
||||
.con_id = _conname, \
|
||||
}
|
||||
|
||||
int __init clk_db8500_ed_fixup(void);
|
||||
int __init clk_init(void);
|
||||
|
|
|
|||
|
|
@ -62,6 +62,12 @@ void __init ux500_init_irq(void)
|
|||
{
|
||||
gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
|
||||
gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
|
||||
|
||||
/*
|
||||
* Init clocks here so that they are available for system timer
|
||||
* initialization.
|
||||
*/
|
||||
clk_init();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom)
|
|||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4-r9, lr} \n\
|
||||
mov ip, %0 \n\
|
||||
mov ip, %2 \n\
|
||||
1: mov lr, r1 \n\
|
||||
ldmia r1!, {r2 - r9} \n\
|
||||
pld [lr, #32] \n\
|
||||
|
|
@ -64,7 +64,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom)
|
|||
mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
|
||||
ldmfd sp!, {r4-r9, pc}"
|
||||
:
|
||||
: "I" (PAGE_SIZE));
|
||||
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE));
|
||||
}
|
||||
|
||||
void feroceon_copy_user_highpage(struct page *to, struct page *from,
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom)
|
|||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, lr} @ 2\n\
|
||||
mov r2, %0 @ 1\n\
|
||||
mov r2, %2 @ 1\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
|
|
@ -44,7 +44,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom)
|
|||
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
|
||||
ldmfd sp!, {r4, pc} @ 3"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
void v4wb_copy_user_highpage(struct page *to, struct page *from,
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom)
|
|||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, lr} @ 2\n\
|
||||
mov r2, %0 @ 1\n\
|
||||
mov r2, %2 @ 1\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
1: stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
|
||||
|
|
@ -40,7 +40,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom)
|
|||
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
|
||||
ldmfd sp!, {r4, pc} @ 3"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
void v4wt_copy_user_highpage(struct page *to, struct page *from,
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom)
|
|||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, r5, lr} \n\
|
||||
mov lr, %0 \n\
|
||||
mov lr, %2 \n\
|
||||
\n\
|
||||
pld [r1, #0] \n\
|
||||
pld [r1, #32] \n\
|
||||
|
|
@ -67,7 +67,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom)
|
|||
\n\
|
||||
ldmfd sp!, {r4, r5, pc}"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64 - 1));
|
||||
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1));
|
||||
}
|
||||
|
||||
void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
|
||||
|
|
|
|||
|
|
@ -393,6 +393,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
|
|||
if (addr < TASK_SIZE)
|
||||
return do_page_fault(addr, fsr, regs);
|
||||
|
||||
if (user_mode(regs))
|
||||
goto bad_area;
|
||||
|
||||
index = pgd_index(addr);
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -48,7 +48,16 @@ void *kmap_atomic(struct page *page, enum km_type type)
|
|||
|
||||
debug_kmap_atomic(type);
|
||||
|
||||
kmap = kmap_high_get(page);
|
||||
#ifdef CONFIG_DEBUG_HIGHMEM
|
||||
/*
|
||||
* There is no cache coherency issue when non VIVT, so force the
|
||||
* dedicated kmap usage for better debugging purposes in that case.
|
||||
*/
|
||||
if (!cache_is_vivt())
|
||||
kmap = NULL;
|
||||
else
|
||||
#endif
|
||||
kmap = kmap_high_get(page);
|
||||
if (kmap)
|
||||
return kmap;
|
||||
|
||||
|
|
|
|||
|
|
@ -678,10 +678,10 @@ void __init mem_init(void)
|
|||
void free_initmem(void)
|
||||
{
|
||||
#ifdef CONFIG_HAVE_TCM
|
||||
extern char *__tcm_start, *__tcm_end;
|
||||
extern char __tcm_start, __tcm_end;
|
||||
|
||||
totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)),
|
||||
__phys_to_pfn(__pa(__tcm_end)),
|
||||
totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
|
||||
__phys_to_pfn(__pa(&__tcm_end)),
|
||||
"TCM link");
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,9 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/err.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include <plat/mtu.h>
|
||||
|
|
@ -124,13 +126,25 @@ static struct irqaction nmdk_timer_irq = {
|
|||
void __init nmdk_timer_init(void)
|
||||
{
|
||||
unsigned long rate;
|
||||
u32 cr = MTU_CRn_32BITS;;
|
||||
struct clk *clk0;
|
||||
struct clk *clk1;
|
||||
u32 cr;
|
||||
|
||||
clk0 = clk_get_sys("mtu0", NULL);
|
||||
BUG_ON(IS_ERR(clk0));
|
||||
|
||||
clk1 = clk_get_sys("mtu1", NULL);
|
||||
BUG_ON(IS_ERR(clk1));
|
||||
|
||||
clk_enable(clk0);
|
||||
clk_enable(clk1);
|
||||
|
||||
/*
|
||||
* Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
|
||||
* use a divide-by-16 counter if it's more than 16MHz
|
||||
*/
|
||||
rate = CLOCK_TICK_RATE;
|
||||
cr = MTU_CRn_32BITS;;
|
||||
rate = clk_get_rate(clk0);
|
||||
if (rate > 16 << 20) {
|
||||
rate /= 16;
|
||||
cr |= MTU_CRn_PRESCALE_16;
|
||||
|
|
@ -153,6 +167,14 @@ void __init nmdk_timer_init(void)
|
|||
nmdk_clksrc.name);
|
||||
|
||||
/* Timer 1 is used for events, fix according to rate */
|
||||
cr = MTU_CRn_32BITS;
|
||||
rate = clk_get_rate(clk1);
|
||||
if (rate > 16 << 20) {
|
||||
rate /= 16;
|
||||
cr |= MTU_CRn_PRESCALE_16;
|
||||
} else {
|
||||
cr |= MTU_CRn_PRESCALE_1;
|
||||
}
|
||||
writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
|
||||
nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
|
||||
nmdk_clkevt.max_delta_ns =
|
||||
|
|
|
|||
|
|
@ -277,7 +277,7 @@ ENTRY(vfp_put_double)
|
|||
#ifdef CONFIG_VFPv3
|
||||
@ d16 - d31 registers
|
||||
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
1: mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr
|
||||
1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr
|
||||
mov pc, lr
|
||||
.org 1b + 8
|
||||
.endr
|
||||
|
|
|
|||
|
|
@ -328,38 +328,6 @@ static struct snd_soc_device spitz_snd_devdata = {
|
|||
.codec_dev = &soc_codec_dev_wm8750,
|
||||
};
|
||||
|
||||
/*
|
||||
* FIXME: This is a temporary bodge to avoid cross-tree merge issues.
|
||||
* New drivers should register the wm8750 I2C device in the machine
|
||||
* setup code (under arch/arm for ARM systems).
|
||||
*/
|
||||
static int wm8750_i2c_register(void)
|
||||
{
|
||||
struct i2c_board_info info;
|
||||
struct i2c_adapter *adapter;
|
||||
struct i2c_client *client;
|
||||
|
||||
memset(&info, 0, sizeof(struct i2c_board_info));
|
||||
info.addr = 0x1b;
|
||||
strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
|
||||
|
||||
adapter = i2c_get_adapter(0);
|
||||
if (!adapter) {
|
||||
printk(KERN_ERR "can't get i2c adapter 0\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
client = i2c_new_device(adapter, &info);
|
||||
i2c_put_adapter(adapter);
|
||||
if (!client) {
|
||||
printk(KERN_ERR "can't add i2c device at 0x%x\n",
|
||||
(unsigned int)info.addr);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_device *spitz_snd_device;
|
||||
|
||||
static int __init spitz_init(void)
|
||||
|
|
@ -369,10 +337,6 @@ static int __init spitz_init(void)
|
|||
if (!(machine_is_spitz() || machine_is_borzoi() || machine_is_akita()))
|
||||
return -ENODEV;
|
||||
|
||||
ret = wm8750_i2c_setup();
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
spitz_snd_device = platform_device_alloc("soc-audio", -1);
|
||||
if (!spitz_snd_device)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
Loading…
Reference in a new issue