Merge remote-tracking branch 'origin/master' into next
(Pickup Stephen's fix d4d7b2a11c
)
This commit is contained in:
commit
7bfb40b048
105 changed files with 724 additions and 305 deletions
|
@ -2649,11 +2649,11 @@ F: drivers/net/wan/dlci.c
|
|||
F: drivers/net/wan/sdla.c
|
||||
|
||||
FRAMEBUFFER LAYER
|
||||
M: Paul Mundt <lethal@linux-sh.org>
|
||||
M: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
W: http://linux-fbdev.sourceforge.net/
|
||||
Q: http://patchwork.kernel.org/project/linux-fbdev/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6.git
|
||||
T: git git://github.com/schandinat/linux-2.6.git fbdev-next
|
||||
S: Maintained
|
||||
F: Documentation/fb/
|
||||
F: Documentation/devicetree/bindings/fb/
|
||||
|
@ -4450,8 +4450,8 @@ M: "David S. Miller" <davem@davemloft.net>
|
|||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net
|
||||
W: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
|
||||
S: Maintained
|
||||
F: net/
|
||||
F: include/net/
|
||||
|
|
|
@ -1271,6 +1271,18 @@ config ARM_ERRATA_754327
|
|||
This workaround defines cpu_relax() as smp_mb(), preventing correctly
|
||||
written polling loops from denying visibility of updates to memory.
|
||||
|
||||
config ARM_ERRATA_364296
|
||||
bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
|
||||
depends on CPU_V6 && !SMP
|
||||
help
|
||||
This options enables the workaround for the 364296 ARM1136
|
||||
r0p2 erratum (possible cache data corruption with
|
||||
hit-under-miss enabled). It sets the undocumented bit 31 in
|
||||
the auxiliary control register and the FI bit in the control
|
||||
register, thus disabling hit-under-miss without putting the
|
||||
processor into full low interrupt latency mode. ARM11MPCore
|
||||
is not affected.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
|
|
@ -82,7 +82,7 @@ asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
|
|||
|
||||
|
||||
/* Disable clock to MMC hardware block */
|
||||
__raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
|
||||
__raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
|
||||
|
||||
mmc_update_progress(MMC_PROGRESS_DONE);
|
||||
}
|
||||
|
|
|
@ -85,7 +85,7 @@ asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
|
|||
goto err;
|
||||
|
||||
/* Disable clock to SDHI1 hardware block */
|
||||
__raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3);
|
||||
__raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
|
||||
|
||||
mmc_update_progress(MMC_PROGRESS_DONE);
|
||||
|
||||
|
|
|
@ -64,7 +64,7 @@
|
|||
#define L2X0_AUX_CTRL_MASK 0xc0000fff
|
||||
#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16
|
||||
#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17
|
||||
#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17)
|
||||
#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17)
|
||||
#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22
|
||||
#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT 26
|
||||
#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT 27
|
||||
|
|
|
@ -41,7 +41,7 @@ struct arm_pmu_platdata {
|
|||
* encoded error on failure.
|
||||
*/
|
||||
extern struct platform_device *
|
||||
reserve_pmu(enum arm_pmu_type device);
|
||||
reserve_pmu(enum arm_pmu_type type);
|
||||
|
||||
/**
|
||||
* release_pmu() - Relinquish control of the performance counters
|
||||
|
@ -62,26 +62,26 @@ release_pmu(enum arm_pmu_type type);
|
|||
* the actual hardware initialisation.
|
||||
*/
|
||||
extern int
|
||||
init_pmu(enum arm_pmu_type device);
|
||||
init_pmu(enum arm_pmu_type type);
|
||||
|
||||
#else /* CONFIG_CPU_HAS_PMU */
|
||||
|
||||
#include <linux/err.h>
|
||||
|
||||
static inline struct platform_device *
|
||||
reserve_pmu(enum arm_pmu_type device)
|
||||
reserve_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline int
|
||||
release_pmu(struct platform_device *pdev)
|
||||
release_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int
|
||||
init_pmu(enum arm_pmu_type device)
|
||||
init_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
|
@ -31,7 +31,7 @@ static int __devinit pmu_register(struct platform_device *pdev,
|
|||
{
|
||||
if (type < 0 || type >= ARM_NUM_PMU_DEVICES) {
|
||||
pr_warning("received registration request for unknown "
|
||||
"device %d\n", type);
|
||||
"PMU device type %d\n", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -112,17 +112,17 @@ static int __init register_pmu_driver(void)
|
|||
device_initcall(register_pmu_driver);
|
||||
|
||||
struct platform_device *
|
||||
reserve_pmu(enum arm_pmu_type device)
|
||||
reserve_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
|
||||
if (test_and_set_bit_lock(device, &pmu_lock)) {
|
||||
if (test_and_set_bit_lock(type, &pmu_lock)) {
|
||||
pdev = ERR_PTR(-EBUSY);
|
||||
} else if (pmu_devices[device] == NULL) {
|
||||
clear_bit_unlock(device, &pmu_lock);
|
||||
} else if (pmu_devices[type] == NULL) {
|
||||
clear_bit_unlock(type, &pmu_lock);
|
||||
pdev = ERR_PTR(-ENODEV);
|
||||
} else {
|
||||
pdev = pmu_devices[device];
|
||||
pdev = pmu_devices[type];
|
||||
}
|
||||
|
||||
return pdev;
|
||||
|
@ -130,11 +130,11 @@ reserve_pmu(enum arm_pmu_type device)
|
|||
EXPORT_SYMBOL_GPL(reserve_pmu);
|
||||
|
||||
int
|
||||
release_pmu(enum arm_pmu_type device)
|
||||
release_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
if (WARN_ON(!pmu_devices[device]))
|
||||
if (WARN_ON(!pmu_devices[type]))
|
||||
return -EINVAL;
|
||||
clear_bit_unlock(device, &pmu_lock);
|
||||
clear_bit_unlock(type, &pmu_lock);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(release_pmu);
|
||||
|
@ -182,17 +182,17 @@ init_cpu_pmu(void)
|
|||
}
|
||||
|
||||
int
|
||||
init_pmu(enum arm_pmu_type device)
|
||||
init_pmu(enum arm_pmu_type type)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
switch (device) {
|
||||
switch (type) {
|
||||
case ARM_PMU_DEVICE_CPU:
|
||||
err = init_cpu_pmu();
|
||||
break;
|
||||
default:
|
||||
pr_warning("attempt to initialise unknown device %d\n",
|
||||
device);
|
||||
pr_warning("attempt to initialise PMU of unknown "
|
||||
"type %d\n", type);
|
||||
err = -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
@ -57,7 +57,8 @@ relocate_new_kernel:
|
|||
mov r0,#0
|
||||
ldr r1,kexec_mach_type
|
||||
ldr r2,kexec_boot_atags
|
||||
mov pc,lr
|
||||
ARM( mov pc, lr )
|
||||
THUMB( bx lr )
|
||||
|
||||
.align
|
||||
|
||||
|
|
|
@ -280,18 +280,19 @@ static void __init cacheid_init(void)
|
|||
if (arch >= CPU_ARCH_ARMv6) {
|
||||
if ((cachetype & (7 << 29)) == 4 << 29) {
|
||||
/* ARMv7 register format */
|
||||
arch = CPU_ARCH_ARMv7;
|
||||
cacheid = CACHEID_VIPT_NONALIASING;
|
||||
if ((cachetype & (3 << 14)) == 1 << 14)
|
||||
cacheid |= CACHEID_ASID_TAGGED;
|
||||
else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
|
||||
cacheid |= CACHEID_VIPT_I_ALIASING;
|
||||
} else if (cachetype & (1 << 23)) {
|
||||
cacheid = CACHEID_VIPT_ALIASING;
|
||||
} else {
|
||||
cacheid = CACHEID_VIPT_NONALIASING;
|
||||
if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6))
|
||||
cacheid |= CACHEID_VIPT_I_ALIASING;
|
||||
arch = CPU_ARCH_ARMv6;
|
||||
if (cachetype & (1 << 23))
|
||||
cacheid = CACHEID_VIPT_ALIASING;
|
||||
else
|
||||
cacheid = CACHEID_VIPT_NONALIASING;
|
||||
}
|
||||
if (cpu_has_aliasing_icache(arch))
|
||||
cacheid |= CACHEID_VIPT_I_ALIASING;
|
||||
} else {
|
||||
cacheid = CACHEID_VIVT;
|
||||
}
|
||||
|
|
|
@ -137,8 +137,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
|
|||
clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
|
||||
clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
|
||||
|
||||
clockevents_register_device(clk);
|
||||
|
||||
/* Make sure our local interrupt controller has this enabled */
|
||||
gic_enable_ppi(clk->irq);
|
||||
|
||||
clockevents_register_device(clk);
|
||||
}
|
||||
|
|
|
@ -157,7 +157,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
* TS72xx memory map:
|
||||
*
|
||||
* virt phys size
|
||||
* febff000 22000000 4K model number register
|
||||
* febff000 22000000 4K model number register (bits 0-2)
|
||||
* febfe000 22400000 4K options register
|
||||
* febfd000 22800000 4K options register #2
|
||||
* febf9000 10800000 4K TS-5620 RTC index register
|
||||
|
@ -20,6 +20,9 @@
|
|||
#define TS72XX_MODEL_TS7200 0x00
|
||||
#define TS72XX_MODEL_TS7250 0x01
|
||||
#define TS72XX_MODEL_TS7260 0x02
|
||||
#define TS72XX_MODEL_TS7300 0x03
|
||||
#define TS72XX_MODEL_TS7400 0x04
|
||||
#define TS72XX_MODEL_MASK 0x07
|
||||
|
||||
|
||||
#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
|
||||
|
@ -51,19 +54,34 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
static inline int ts72xx_model(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7200(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
|
||||
return ts72xx_model() == TS72XX_MODEL_TS7200;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7250(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
|
||||
return ts72xx_model() == TS72XX_MODEL_TS7250;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7260(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
|
||||
return ts72xx_model() == TS72XX_MODEL_TS7260;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7300(void)
|
||||
{
|
||||
return ts72xx_model() == TS72XX_MODEL_TS7300;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7400(void)
|
||||
{
|
||||
return ts72xx_model() == TS72XX_MODEL_TS7400;
|
||||
}
|
||||
|
||||
static inline int is_max197_installed(void)
|
||||
|
|
|
@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
|
|||
.ctrlbit = (1 << 21),
|
||||
}, {
|
||||
.name = "ac97",
|
||||
.id = -1,
|
||||
.devname = "samsung-ac97",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 27),
|
||||
}, {
|
||||
|
|
|
@ -24,12 +24,13 @@
|
|||
#include <plat/exynos4.h>
|
||||
#include <plat/adc-core.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/fb-core.h>
|
||||
#include <plat/fimc-core.h>
|
||||
#include <plat/iic-core.h>
|
||||
#include <plat/reset.h>
|
||||
|
||||
#include <mach/regs-irq.h>
|
||||
#include <mach/regs-pmu.h>
|
||||
|
||||
extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
|
||||
unsigned int irq_start);
|
||||
|
@ -128,6 +129,11 @@ static void exynos4_idle(void)
|
|||
local_irq_enable();
|
||||
}
|
||||
|
||||
static void exynos4_sw_reset(void)
|
||||
{
|
||||
__raw_writel(0x1, S5P_SWRESET);
|
||||
}
|
||||
|
||||
/*
|
||||
* exynos4_map_io
|
||||
*
|
||||
|
@ -241,5 +247,8 @@ int __init exynos4_init(void)
|
|||
/* set idle function */
|
||||
pm_idle = exynos4_idle;
|
||||
|
||||
/* set sw_reset function */
|
||||
s5p_reset_hook = exynos4_sw_reset;
|
||||
|
||||
return sysdev_register(&exynos4_sysdev);
|
||||
}
|
||||
|
|
|
@ -80,9 +80,8 @@
|
|||
#define IRQ_HSMMC3 IRQ_SPI(76)
|
||||
#define IRQ_DWMCI IRQ_SPI(77)
|
||||
|
||||
#define IRQ_MIPICSI0 IRQ_SPI(78)
|
||||
|
||||
#define IRQ_MIPICSI1 IRQ_SPI(80)
|
||||
#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
|
||||
#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
|
||||
|
||||
#define IRQ_ONENAND_AUDI IRQ_SPI(82)
|
||||
#define IRQ_ROTATOR IRQ_SPI(83)
|
||||
|
|
|
@ -29,6 +29,8 @@
|
|||
#define S5P_USE_STANDBY_WFE1 (1 << 25)
|
||||
#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24))
|
||||
|
||||
#define S5P_SWRESET S5P_PMUREG(0x0400)
|
||||
|
||||
#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
|
||||
#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
|
||||
#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
|
||||
#include <mach/regs-gpio.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
static DEFINE_SPINLOCK(eint_lock);
|
||||
|
||||
static unsigned int eint0_15_data[16];
|
||||
|
@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
|
|||
|
||||
static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
chained_irq_enter(chip, desc);
|
||||
exynos4_irq_demux_eint(IRQ_EINT(16));
|
||||
exynos4_irq_demux_eint(IRQ_EINT(24));
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
|
||||
|
@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
|
|||
u32 *irq_data = irq_get_handler_data(irq);
|
||||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
chip->irq_mask(&desc->irq_data);
|
||||
|
||||
if (chip->irq_ack)
|
||||
|
@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
|
|||
generic_handle_irq(*irq_data);
|
||||
|
||||
chip->irq_unmask(&desc->irq_data);
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
int __init exynos4_init_irq_eint(void)
|
||||
|
|
|
@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
|
|||
};
|
||||
|
||||
static struct regulator_consumer_supply max8952_consumer =
|
||||
REGULATOR_SUPPLY("vddarm", NULL);
|
||||
REGULATOR_SUPPLY("vdd_arm", NULL);
|
||||
|
||||
static struct max8952_platform_data universal_max8952_pdata __initdata = {
|
||||
.gpio_vid0 = EXYNOS4_GPX0(3),
|
||||
|
@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
|
|||
};
|
||||
|
||||
static struct regulator_consumer_supply lp3974_buck1_consumer =
|
||||
REGULATOR_SUPPLY("vddint", NULL);
|
||||
REGULATOR_SUPPLY("vdd_int", NULL);
|
||||
|
||||
static struct regulator_consumer_supply lp3974_buck2_consumer =
|
||||
REGULATOR_SUPPLY("vddg3d", NULL);
|
||||
|
|
|
@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
|
|||
|
||||
rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
|
||||
writel(rstcon, EXYNOS4_RSTCON);
|
||||
udelay(50);
|
||||
udelay(80);
|
||||
|
||||
clk_disable(otg_clk);
|
||||
clk_put(otg_clk);
|
||||
|
|
|
@ -62,6 +62,7 @@ config ARCH_EBSA285_HOST
|
|||
config ARCH_NETWINDER
|
||||
bool "NetWinder"
|
||||
select CLKSRC_I8253
|
||||
select CLKEVT_I8253
|
||||
select FOOTBRIDGE_HOST
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
|
|
|
@ -310,7 +310,7 @@ static struct sys_timer eukrea_cpuimx27_timer = {
|
|||
.init = eukrea_cpuimx27_timer_init,
|
||||
};
|
||||
|
||||
MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
|
||||
MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
|
|
|
@ -192,7 +192,7 @@ struct sys_timer eukrea_cpuimx35_timer = {
|
|||
.init = eukrea_cpuimx35_timer_init,
|
||||
};
|
||||
|
||||
MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35")
|
||||
MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
|
||||
/* Maintainer: Eukrea Electromatique */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.map_io = mx35_map_io,
|
||||
|
|
|
@ -161,7 +161,7 @@ static struct sys_timer eukrea_cpuimx25_timer = {
|
|||
.init = eukrea_cpuimx25_timer_init,
|
||||
};
|
||||
|
||||
MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
|
||||
MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
|
||||
/* Maintainer: Eukrea Electromatique */
|
||||
.boot_params = MX25_PHYS_OFFSET + 0x100,
|
||||
.map_io = mx25_map_io,
|
||||
|
|
|
@ -77,7 +77,7 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|||
/*
|
||||
* Check for devices with hard-wired IRQs.
|
||||
*/
|
||||
irq = orion5x_pci_map_irq(const dev, slot, pin);
|
||||
irq = orion5x_pci_map_irq(dev, slot, pin);
|
||||
if (irq != -1)
|
||||
return irq;
|
||||
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/mbus.h>
|
||||
#include <video/vga.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <plat/pcie.h>
|
||||
|
|
|
@ -44,6 +44,7 @@ static inline void arch_reset(char mode, const char *cmd)
|
|||
*/
|
||||
if (realview_reset)
|
||||
realview_reset(mode);
|
||||
dsb();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/suspend.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/irqs.h>
|
||||
|
|
|
@ -129,7 +129,7 @@ static int s5p64x0_alloc_gc(void)
|
|||
}
|
||||
|
||||
ct = gc->chip_types;
|
||||
ct->chip.irq_ack = irq_gc_ack;
|
||||
ct->chip.irq_ack = irq_gc_ack_set_bit;
|
||||
ct->chip.irq_mask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
|
||||
ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
|
||||
|
|
|
@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
|
|||
SAVE_ITEM(S3C2410_TCNTO(0)),
|
||||
};
|
||||
|
||||
void s5pv210_cpu_suspend(unsigned long arg)
|
||||
static int s5pv210_cpu_suspend(unsigned long arg)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
|
|
|
@ -341,6 +341,7 @@ static struct platform_device mipidsi0_device = {
|
|||
static struct sh_mobile_sdhi_info sdhi0_info = {
|
||||
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
|
||||
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
|
||||
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
|
||||
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
|
||||
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
|
||||
};
|
||||
|
@ -382,7 +383,7 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
|
|||
}
|
||||
|
||||
static struct sh_mobile_sdhi_info sh_sdhi1_info = {
|
||||
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
|
||||
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
|
||||
.tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
|
||||
.tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
.set_pwr = ag5evm_sdhi1_set_pwr,
|
||||
|
|
|
@ -641,6 +641,8 @@ static struct usbhs_private usbhs0_private = {
|
|||
},
|
||||
.driver_param = {
|
||||
.buswait_bwait = 4,
|
||||
.d0_tx_id = SHDMA_SLAVE_USB0_TX,
|
||||
.d1_rx_id = SHDMA_SLAVE_USB0_RX,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
@ -810,6 +812,8 @@ static struct usbhs_private usbhs1_private = {
|
|||
.buswait_bwait = 4,
|
||||
.pipe_type = usbhs1_pipe_cfg,
|
||||
.pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
|
||||
.d0_tx_id = SHDMA_SLAVE_USB1_TX,
|
||||
.d1_rx_id = SHDMA_SLAVE_USB1_RX,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
|
|
@ -503,16 +503,17 @@ static struct clk *late_main_clks[] = {
|
|||
&sh7372_fsidivb_clk,
|
||||
};
|
||||
|
||||
enum { MSTP001,
|
||||
enum { MSTP001, MSTP000,
|
||||
MSTP131, MSTP130,
|
||||
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
|
||||
MSTP118, MSTP117, MSTP116, MSTP113,
|
||||
MSTP106, MSTP101, MSTP100,
|
||||
MSTP223,
|
||||
MSTP218, MSTP217, MSTP216,
|
||||
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
||||
MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
|
||||
MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
|
||||
MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
|
||||
MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
||||
MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
|
||||
MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
|
||||
MSTP405, MSTP404, MSTP403, MSTP400,
|
||||
MSTP_NR };
|
||||
|
||||
#define MSTP(_parent, _reg, _bit, _flags) \
|
||||
|
@ -520,6 +521,7 @@ enum { MSTP001,
|
|||
|
||||
static struct clk mstp_clks[MSTP_NR] = {
|
||||
[MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
|
||||
[MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
|
||||
[MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
|
||||
[MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
|
||||
[MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
|
||||
|
@ -538,14 +540,16 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||
[MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
|
||||
[MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
|
||||
[MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
|
||||
[MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
|
||||
[MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
|
||||
[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
|
||||
[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
|
||||
[MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
|
||||
[MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
|
||||
[MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
|
||||
[MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
|
||||
[MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
|
||||
[MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
|
||||
[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
|
||||
[MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
|
||||
[MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
|
||||
[MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
|
||||
|
@ -557,8 +561,12 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||
[MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
|
||||
[MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
|
||||
[MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
|
||||
[MSTP407] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-DMAC1 */
|
||||
[MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
|
||||
[MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
|
||||
[MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
|
||||
[MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
|
||||
[MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
|
||||
};
|
||||
|
||||
static struct clk_lookup lookups[] = {
|
||||
|
@ -609,6 +617,7 @@ static struct clk_lookup lookups[] = {
|
|||
|
||||
/* MSTP32 clocks */
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
|
||||
CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
|
||||
CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
|
||||
CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
|
||||
CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
|
||||
|
@ -629,14 +638,16 @@ static struct clk_lookup lookups[] = {
|
|||
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */
|
||||
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
|
||||
CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
|
||||
CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
|
||||
CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
|
||||
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
|
||||
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
|
||||
CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
|
||||
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
|
||||
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
|
||||
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
|
||||
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
|
||||
CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
|
||||
|
@ -650,10 +661,14 @@ static struct clk_lookup lookups[] = {
|
|||
CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
|
||||
CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
|
||||
CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
|
||||
CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
|
||||
CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
|
||||
CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
|
||||
CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
|
||||
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
|
||||
CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
|
||||
|
||||
CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
|
||||
&div6_reparent_clks[DIV6_HDMI]),
|
||||
|
|
|
@ -365,7 +365,7 @@ void __init sh73a0_clock_init(void)
|
|||
__raw_writel(0x108, SD2CKCR);
|
||||
|
||||
/* detect main clock parent */
|
||||
switch ((__raw_readl(CKSCR) >> 24) & 0x03) {
|
||||
switch ((__raw_readl(CKSCR) >> 28) & 0x03) {
|
||||
case 0:
|
||||
main_clk.parent = &sh73a0_extal1_clk;
|
||||
break;
|
||||
|
|
|
@ -459,6 +459,10 @@ enum {
|
|||
SHDMA_SLAVE_SDHI2_TX,
|
||||
SHDMA_SLAVE_MMCIF_RX,
|
||||
SHDMA_SLAVE_MMCIF_TX,
|
||||
SHDMA_SLAVE_USB0_TX,
|
||||
SHDMA_SLAVE_USB0_RX,
|
||||
SHDMA_SLAVE_USB1_TX,
|
||||
SHDMA_SLAVE_USB1_RX,
|
||||
};
|
||||
|
||||
extern struct clk sh7372_extal1_clk;
|
||||
|
|
|
@ -379,7 +379,7 @@ enum {
|
|||
/* BBIF2 */
|
||||
VPU,
|
||||
TSIF1,
|
||||
_3DG_SGX530,
|
||||
/* 3DG */
|
||||
_2DDMAC,
|
||||
IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
|
||||
IPMMU_IPMMUR, IPMMU_IPMMUR2,
|
||||
|
@ -436,7 +436,7 @@ static struct intc_vect intcs_vectors[] = {
|
|||
/* BBIF2 */
|
||||
INTCS_VECT(VPU, 0x980),
|
||||
INTCS_VECT(TSIF1, 0x9a0),
|
||||
INTCS_VECT(_3DG_SGX530, 0x9e0),
|
||||
/* 3DG */
|
||||
INTCS_VECT(_2DDMAC, 0xa00),
|
||||
INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
|
||||
INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
|
||||
|
@ -521,7 +521,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
|
|||
RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
|
||||
{ 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
|
||||
{ 0, 0, MSIOF, 0,
|
||||
_3DG_SGX530, 0, 0, 0 } },
|
||||
0, 0, 0, 0 } },
|
||||
{ 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
|
||||
{ 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
|
||||
0, 0, 0, 0 } },
|
||||
|
@ -561,7 +561,6 @@ static struct intc_prio_reg intcs_prio_registers[] = {
|
|||
TMU_TUNI2, TSIF1 } },
|
||||
{ 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
|
||||
{ 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
|
||||
{ 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, _3DG_SGX530, 0, 0 } },
|
||||
{ 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
|
||||
{ 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
|
||||
{ 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
|
||||
|
|
|
@ -169,35 +169,35 @@ static struct platform_device scif6_device = {
|
|||
};
|
||||
|
||||
/* CMT */
|
||||
static struct sh_timer_config cmt10_platform_data = {
|
||||
.name = "CMT10",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 0,
|
||||
static struct sh_timer_config cmt2_platform_data = {
|
||||
.name = "CMT2",
|
||||
.channel_offset = 0x40,
|
||||
.timer_bit = 5,
|
||||
.clockevent_rating = 125,
|
||||
.clocksource_rating = 125,
|
||||
};
|
||||
|
||||
static struct resource cmt10_resources[] = {
|
||||
static struct resource cmt2_resources[] = {
|
||||
[0] = {
|
||||
.name = "CMT10",
|
||||
.start = 0xe6138010,
|
||||
.end = 0xe613801b,
|
||||
.name = "CMT2",
|
||||
.start = 0xe6130040,
|
||||
.end = 0xe613004b,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x0b00), /* CMT1_CMT10 */
|
||||
.start = evt2irq(0x0b80), /* CMT2 */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device cmt10_device = {
|
||||
static struct platform_device cmt2_device = {
|
||||
.name = "sh_cmt",
|
||||
.id = 10,
|
||||
.id = 2,
|
||||
.dev = {
|
||||
.platform_data = &cmt10_platform_data,
|
||||
.platform_data = &cmt2_platform_data,
|
||||
},
|
||||
.resource = cmt10_resources,
|
||||
.num_resources = ARRAY_SIZE(cmt10_resources),
|
||||
.resource = cmt2_resources,
|
||||
.num_resources = ARRAY_SIZE(cmt2_resources),
|
||||
};
|
||||
|
||||
/* TMU */
|
||||
|
@ -602,6 +602,150 @@ static struct platform_device dma2_device = {
|
|||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB-DMAC
|
||||
*/
|
||||
|
||||
unsigned int usbts_shift[] = {3, 4, 5};
|
||||
|
||||
enum {
|
||||
XMIT_SZ_8BYTE = 0,
|
||||
XMIT_SZ_16BYTE = 1,
|
||||
XMIT_SZ_32BYTE = 2,
|
||||
};
|
||||
|
||||
#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
|
||||
|
||||
static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = {
|
||||
{
|
||||
.offset = 0,
|
||||
}, {
|
||||
.offset = 0x20,
|
||||
},
|
||||
};
|
||||
|
||||
/* USB DMAC0 */
|
||||
static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = {
|
||||
{
|
||||
.slave_id = SHDMA_SLAVE_USB0_TX,
|
||||
.chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
|
||||
}, {
|
||||
.slave_id = SHDMA_SLAVE_USB0_RX,
|
||||
.chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_dmae_pdata usb_dma0_platform_data = {
|
||||
.slave = sh7372_usb_dmae0_slaves,
|
||||
.slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves),
|
||||
.channel = sh7372_usb_dmae_channels,
|
||||
.channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
|
||||
.ts_low_shift = 6,
|
||||
.ts_low_mask = 0xc0,
|
||||
.ts_high_shift = 0,
|
||||
.ts_high_mask = 0,
|
||||
.ts_shift = usbts_shift,
|
||||
.ts_shift_num = ARRAY_SIZE(usbts_shift),
|
||||
.dmaor_init = DMAOR_DME,
|
||||
.chcr_offset = 0x14,
|
||||
.chcr_ie_bit = 1 << 5,
|
||||
.dmaor_is_32bit = 1,
|
||||
.needs_tend_set = 1,
|
||||
.no_dmars = 1,
|
||||
};
|
||||
|
||||
static struct resource sh7372_usb_dmae0_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xe68a0020,
|
||||
.end = 0xe68a0064 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* VCR/SWR/DMICR */
|
||||
.start = 0xe68a0000,
|
||||
.end = 0xe68a0014 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels */
|
||||
.start = evt2irq(0x0a00),
|
||||
.end = evt2irq(0x0a00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device usb_dma0_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 3,
|
||||
.resource = sh7372_usb_dmae0_resources,
|
||||
.num_resources = ARRAY_SIZE(sh7372_usb_dmae0_resources),
|
||||
.dev = {
|
||||
.platform_data = &usb_dma0_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* USB DMAC1 */
|
||||
static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
|
||||
{
|
||||
.slave_id = SHDMA_SLAVE_USB1_TX,
|
||||
.chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
|
||||
}, {
|
||||
.slave_id = SHDMA_SLAVE_USB1_RX,
|
||||
.chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_dmae_pdata usb_dma1_platform_data = {
|
||||
.slave = sh7372_usb_dmae1_slaves,
|
||||
.slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
|
||||
.channel = sh7372_usb_dmae_channels,
|
||||
.channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
|
||||
.ts_low_shift = 6,
|
||||
.ts_low_mask = 0xc0,
|
||||
.ts_high_shift = 0,
|
||||
.ts_high_mask = 0,
|
||||
.ts_shift = usbts_shift,
|
||||
.ts_shift_num = ARRAY_SIZE(usbts_shift),
|
||||
.dmaor_init = DMAOR_DME,
|
||||
.chcr_offset = 0x14,
|
||||
.chcr_ie_bit = 1 << 5,
|
||||
.dmaor_is_32bit = 1,
|
||||
.needs_tend_set = 1,
|
||||
.no_dmars = 1,
|
||||
};
|
||||
|
||||
static struct resource sh7372_usb_dmae1_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xe68c0020,
|
||||
.end = 0xe68c0064 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* VCR/SWR/DMICR */
|
||||
.start = 0xe68c0000,
|
||||
.end = 0xe68c0014 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels */
|
||||
.start = evt2irq(0x1d00),
|
||||
.end = evt2irq(0x1d00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device usb_dma1_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 4,
|
||||
.resource = sh7372_usb_dmae1_resources,
|
||||
.num_resources = ARRAY_SIZE(sh7372_usb_dmae1_resources),
|
||||
.dev = {
|
||||
.platform_data = &usb_dma1_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* VPU */
|
||||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU5HG",
|
||||
|
@ -818,7 +962,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
|
|||
&scif4_device,
|
||||
&scif5_device,
|
||||
&scif6_device,
|
||||
&cmt10_device,
|
||||
&cmt2_device,
|
||||
&tmu00_device,
|
||||
&tmu01_device,
|
||||
};
|
||||
|
@ -829,6 +973,8 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
|
|||
&dma0_device,
|
||||
&dma1_device,
|
||||
&dma2_device,
|
||||
&usb_dma0_device,
|
||||
&usb_dma1_device,
|
||||
&vpu_device,
|
||||
&veu0_device,
|
||||
&veu1_device,
|
||||
|
|
|
@ -318,6 +318,10 @@ static struct clk v2m_sp804_clk = {
|
|||
.rate = 1000000,
|
||||
};
|
||||
|
||||
static struct clk v2m_ref_clk = {
|
||||
.rate = 32768,
|
||||
};
|
||||
|
||||
static struct clk dummy_apb_pclk;
|
||||
|
||||
static struct clk_lookup v2m_lookups[] = {
|
||||
|
@ -348,6 +352,9 @@ static struct clk_lookup v2m_lookups[] = {
|
|||
}, { /* CLCD */
|
||||
.dev_id = "mb:clcd",
|
||||
.clk = &osc1_clk,
|
||||
}, { /* SP805 WDT */
|
||||
.dev_id = "mb:wdt",
|
||||
.clk = &v2m_ref_clk,
|
||||
}, { /* SP804 timers */
|
||||
.dev_id = "sp804",
|
||||
.con_id = "v2m-timer0",
|
||||
|
|
|
@ -379,7 +379,7 @@ ENTRY(cpu_arm920_set_pte_ext)
|
|||
|
||||
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
|
||||
.globl cpu_arm920_suspend_size
|
||||
.equ cpu_arm920_suspend_size, 4 * 3
|
||||
.equ cpu_arm920_suspend_size, 4 * 4
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
ENTRY(cpu_arm920_do_suspend)
|
||||
stmfd sp!, {r4 - r7, lr}
|
||||
|
|
|
@ -394,7 +394,7 @@ ENTRY(cpu_arm926_set_pte_ext)
|
|||
|
||||
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
|
||||
.globl cpu_arm926_suspend_size
|
||||
.equ cpu_arm926_suspend_size, 4 * 3
|
||||
.equ cpu_arm926_suspend_size, 4 * 4
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
ENTRY(cpu_arm926_do_suspend)
|
||||
stmfd sp!, {r4 - r7, lr}
|
||||
|
|
|
@ -182,11 +182,11 @@ ENDPROC(cpu_sa1100_do_suspend)
|
|||
|
||||
ENTRY(cpu_sa1100_do_resume)
|
||||
ldmia r0, {r4 - r7} @ load cp regs
|
||||
mov r1, #0
|
||||
mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs
|
||||
mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache
|
||||
mcr p15, 0, r1, c9, c0, 0 @ invalidate RB
|
||||
mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB
|
||||
mov ip, #0
|
||||
mcr p15, 0, ip, c8, c7, 0 @ flush I+D TLBs
|
||||
mcr p15, 0, ip, c7, c7, 0 @ flush I&D cache
|
||||
mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
|
||||
mcr p15, 0, ip, c9, c0, 5 @ allow user space to use RB
|
||||
|
||||
mcr p15, 0, r4, c3, c0, 0 @ domain ID
|
||||
mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
|
||||
|
|
|
@ -223,6 +223,22 @@ __v6_setup:
|
|||
mrc p15, 0, r0, c1, c0, 0 @ read control register
|
||||
bic r0, r0, r5 @ clear bits them
|
||||
orr r0, r0, r6 @ set them
|
||||
#ifdef CONFIG_ARM_ERRATA_364296
|
||||
/*
|
||||
* Workaround for the 364296 ARM1136 r0p2 erratum (possible cache data
|
||||
* corruption with hit-under-miss enabled). The conditional code below
|
||||
* (setting the undocumented bit 31 in the auxiliary control register
|
||||
* and the FI bit in the control register) disables hit-under-miss
|
||||
* without putting the processor into full low interrupt latency mode.
|
||||
*/
|
||||
ldr r6, =0x4107b362 @ id for ARM1136 r0p2
|
||||
mrc p15, 0, r5, c0, c0, 0 @ get processor id
|
||||
teq r5, r6 @ check for the faulty core
|
||||
mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg
|
||||
orreq r5, r5, #(1 << 31) @ set the undocumented bit 31
|
||||
mcreq p15, 0, r5, c1, c0, 1 @ write aux control reg
|
||||
orreq r0, r0, #(1 << 21) @ low interrupt latency configuration
|
||||
#endif
|
||||
mov pc, lr @ return to head.S:__ret
|
||||
|
||||
/*
|
||||
|
|
|
@ -66,6 +66,7 @@ ENDPROC(cpu_v7_proc_fin)
|
|||
ENTRY(cpu_v7_reset)
|
||||
mrc p15, 0, r1, c1, c0, 0 @ ctrl register
|
||||
bic r1, r1, #0x1 @ ...............m
|
||||
THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions)
|
||||
mcr p15, 0, r1, c1, c0, 0 @ disable MMU
|
||||
isb
|
||||
mov pc, r0
|
||||
|
@ -247,13 +248,16 @@ ENTRY(cpu_v7_do_resume)
|
|||
mcr p15, 0, r7, c2, c0, 0 @ TTB 0
|
||||
mcr p15, 0, r8, c2, c0, 1 @ TTB 1
|
||||
mcr p15, 0, ip, c2, c0, 2 @ TTB control register
|
||||
mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register
|
||||
mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
|
||||
teq r4, r10 @ Is it already set?
|
||||
mcrne p15, 0, r10, c1, c0, 1 @ No, so write it
|
||||
mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control
|
||||
ldr r4, =PRRR @ PRRR
|
||||
ldr r5, =NMRR @ NMRR
|
||||
mcr p15, 0, r4, c10, c2, 0 @ write PRRR
|
||||
mcr p15, 0, r5, c10, c2, 1 @ write NMRR
|
||||
isb
|
||||
dsb
|
||||
mov r0, r9 @ control register
|
||||
mov r2, r7, lsr #14 @ get TTB0 base
|
||||
mov r2, r2, lsl #14
|
||||
|
|
|
@ -406,7 +406,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
|
|||
.align
|
||||
|
||||
.globl cpu_xsc3_suspend_size
|
||||
.equ cpu_xsc3_suspend_size, 4 * 8
|
||||
.equ cpu_xsc3_suspend_size, 4 * 7
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
ENTRY(cpu_xsc3_do_suspend)
|
||||
stmfd sp!, {r4 - r10, lr}
|
||||
|
@ -418,12 +418,12 @@ ENTRY(cpu_xsc3_do_suspend)
|
|||
mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg
|
||||
mrc p15, 0, r10, c1, c0, 0 @ control reg
|
||||
bic r4, r4, #2 @ clear frequency change bit
|
||||
stmia r0, {r1, r4 - r10} @ store v:p offset + cp regs
|
||||
stmia r0, {r4 - r10} @ store cp regs
|
||||
ldmia sp!, {r4 - r10, pc}
|
||||
ENDPROC(cpu_xsc3_do_suspend)
|
||||
|
||||
ENTRY(cpu_xsc3_do_resume)
|
||||
ldmia r0, {r1, r4 - r10} @ load v:p offset + cp regs
|
||||
ldmia r0, {r4 - r10} @ load cp regs
|
||||
mov ip, #0
|
||||
mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
|
||||
mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
|
||||
|
|
|
@ -192,7 +192,7 @@ unsigned long s5p_spdif_get_rate(struct clk *clk)
|
|||
if (IS_ERR(pclk))
|
||||
return -EINVAL;
|
||||
|
||||
rate = pclk->ops->get_rate(clk);
|
||||
rate = pclk->ops->get_rate(pclk);
|
||||
clk_put(pclk);
|
||||
|
||||
return rate;
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include <plat/gpio-core.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u)
|
||||
|
||||
#define CON_OFFSET 0x700
|
||||
|
@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
|
|||
int group, pend_offset, mask_offset;
|
||||
unsigned int pend, mask;
|
||||
|
||||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
for (group = 0; group < bank->nr_groups; group++) {
|
||||
struct s3c_gpio_chip *chip = bank->chips[group];
|
||||
if (!chip)
|
||||
|
@ -102,6 +107,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
|
|||
pend &= ~BIT(offset);
|
||||
}
|
||||
}
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
|
||||
|
|
|
@ -20,7 +20,7 @@ struct samsung_bl_gpio_info {
|
|||
int func;
|
||||
};
|
||||
|
||||
extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
|
||||
extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
|
||||
struct platform_pwm_backlight_data *bl_data);
|
||||
|
||||
#endif /* __ASM_PLAT_BACKLIGHT_H */
|
||||
|
|
|
@ -22,9 +22,14 @@
|
|||
#include <plat/irq-vic-timer.h>
|
||||
#include <plat/regs-timer.h>
|
||||
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
chained_irq_enter(chip, desc);
|
||||
generic_handle_irq((int)desc->irq_data.handler_data);
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
|
||||
|
|
|
@ -351,7 +351,7 @@ centro MACH_CENTRO CENTRO 1944
|
|||
nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
|
||||
omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
|
||||
cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
|
||||
eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
|
||||
eukrea_cpuimx27 MACH_EUKREA_CPUIMX27 EUKREA_CPUIMX27 1975
|
||||
acs5k MACH_ACS5K ACS5K 1982
|
||||
snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987
|
||||
dsm320 MACH_DSM320 DSM320 1988
|
||||
|
@ -476,8 +476,8 @@ cns3420vb MACH_CNS3420VB CNS3420VB 2776
|
|||
omap4_panda MACH_OMAP4_PANDA OMAP4_PANDA 2791
|
||||
ti8168evm MACH_TI8168EVM TI8168EVM 2800
|
||||
teton_bga MACH_TETON_BGA TETON_BGA 2816
|
||||
eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25 EUKREA_CPUIMX25 2820
|
||||
eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35 EUKREA_CPUIMX35 2821
|
||||
eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25SD EUKREA_CPUIMX25SD 2820
|
||||
eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821
|
||||
eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822
|
||||
eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823
|
||||
smdkc210 MACH_SMDKC210 SMDKC210 2838
|
||||
|
|
|
@ -259,7 +259,7 @@
|
|||
ENTRY_SAME(ni_syscall) /* query_module */
|
||||
ENTRY_SAME(poll)
|
||||
/* structs contain pointers and an in_addr... */
|
||||
ENTRY_COMP(nfsservctl)
|
||||
ENTRY_SAME(ni_syscall) /* was nfsservctl */
|
||||
ENTRY_SAME(setresgid) /* 170 */
|
||||
ENTRY_SAME(getresgid)
|
||||
ENTRY_SAME(prctl)
|
||||
|
|
|
@ -171,7 +171,7 @@ SYSCALL_SPU(setresuid)
|
|||
SYSCALL_SPU(getresuid)
|
||||
SYSCALL(ni_syscall)
|
||||
SYSCALL_SPU(poll)
|
||||
COMPAT_SYS(nfsservctl)
|
||||
SYSCALL(ni_syscall)
|
||||
SYSCALL_SPU(setresgid)
|
||||
SYSCALL_SPU(getresgid)
|
||||
COMPAT_SYS_SPU(prctl)
|
||||
|
|
|
@ -123,7 +123,7 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
|
|||
struct perf_event;
|
||||
struct perf_sample_data;
|
||||
|
||||
extern void ptrace_triggered(struct perf_event *bp, int nmi,
|
||||
extern void ptrace_triggered(struct perf_event *bp,
|
||||
struct perf_sample_data *data, struct pt_regs *regs);
|
||||
|
||||
#define task_pt_regs(task) \
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/serial_sci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_dma.h>
|
||||
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
#include <linux/atomic.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
static void (*pm_idle)(void);
|
||||
void (*pm_idle)(void);
|
||||
|
||||
static int hlt_counter;
|
||||
|
||||
|
|
|
@ -316,6 +316,35 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
|
|||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 9: /* mov.w @(disp,PC),Rn */
|
||||
srcu = (unsigned char __user *)regs->pc;
|
||||
srcu += 4;
|
||||
srcu += (instruction & 0x00FF) << 1;
|
||||
dst = (unsigned char *)rn;
|
||||
*(unsigned long *)dst = 0;
|
||||
|
||||
#if !defined(__LITTLE_ENDIAN__)
|
||||
dst += 2;
|
||||
#endif
|
||||
|
||||
if (ma->from(dst, srcu, 2))
|
||||
goto fetch_fault;
|
||||
sign_extend(2, dst);
|
||||
ret = 0;
|
||||
break;
|
||||
|
||||
case 0xd: /* mov.l @(disp,PC),Rn */
|
||||
srcu = (unsigned char __user *)(regs->pc & ~0x3);
|
||||
srcu += 4;
|
||||
srcu += (instruction & 0x00FF) << 2;
|
||||
dst = (unsigned char *)rn;
|
||||
*(unsigned long *)dst = 0;
|
||||
|
||||
if (ma->from(dst, srcu, 4))
|
||||
goto fetch_fault;
|
||||
ret = 0;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
|
||||
|
@ -466,6 +495,7 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
|
|||
case 0x0500: /* mov.w @(disp,Rm),R0 */
|
||||
goto simple;
|
||||
case 0x0B00: /* bf lab - no delayslot*/
|
||||
ret = 0;
|
||||
break;
|
||||
case 0x0F00: /* bf/s lab */
|
||||
ret = handle_delayslot(regs, instruction, ma);
|
||||
|
@ -479,6 +509,7 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
|
|||
}
|
||||
break;
|
||||
case 0x0900: /* bt lab - no delayslot */
|
||||
ret = 0;
|
||||
break;
|
||||
case 0x0D00: /* bt/s lab */
|
||||
ret = handle_delayslot(regs, instruction, ma);
|
||||
|
@ -494,6 +525,9 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
|
|||
}
|
||||
break;
|
||||
|
||||
case 0x9000: /* mov.w @(disp,Rm),Rn */
|
||||
goto simple;
|
||||
|
||||
case 0xA000: /* bra label */
|
||||
ret = handle_delayslot(regs, instruction, ma);
|
||||
if (ret==0)
|
||||
|
@ -507,6 +541,9 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
|
|||
regs->pc += SH_PC_12BIT_OFFSET(instruction);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xD000: /* mov.l @(disp,Rm),Rn */
|
||||
goto simple;
|
||||
}
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -88,7 +88,7 @@ BTFIXUPDEF_CALL(void, set_irq_udt, int)
|
|||
#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
|
||||
|
||||
/* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
|
||||
#define SUN4D_IPI_IRQ 14
|
||||
#define SUN4D_IPI_IRQ 13
|
||||
|
||||
extern void sun4d_ipi_interrupt(void);
|
||||
|
||||
|
|
|
@ -440,8 +440,14 @@ static void __init init_sparc64_elf_hwcap(void)
|
|||
cap |= AV_SPARC_VIS;
|
||||
if (tlb_type == cheetah || tlb_type == cheetah_plus)
|
||||
cap |= AV_SPARC_VIS | AV_SPARC_VIS2;
|
||||
if (tlb_type == cheetah_plus)
|
||||
cap |= AV_SPARC_POPC;
|
||||
if (tlb_type == cheetah_plus) {
|
||||
unsigned long impl, ver;
|
||||
|
||||
__asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
|
||||
impl = ((ver >> 32) & 0xffff);
|
||||
if (impl == PANTHER_IMPL)
|
||||
cap |= AV_SPARC_POPC;
|
||||
}
|
||||
if (tlb_type == hypervisor) {
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
|
||||
cap |= AV_SPARC_ASI_BLK_INIT;
|
||||
|
|
|
@ -68,7 +68,7 @@ sys_call_table32:
|
|||
.word compat_sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys32_mlockall
|
||||
/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler
|
||||
.word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep
|
||||
/*250*/ .word sys_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys32_nfsservctl
|
||||
/*250*/ .word sys_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys_nis_syscall
|
||||
.word sys32_sync_file_range, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep
|
||||
/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun
|
||||
.word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy
|
||||
|
|
|
@ -15,6 +15,7 @@ MODULE_LICENSE("GPL");
|
|||
static int bcma_bus_match(struct device *dev, struct device_driver *drv);
|
||||
static int bcma_device_probe(struct device *dev);
|
||||
static int bcma_device_remove(struct device *dev);
|
||||
static int bcma_device_uevent(struct device *dev, struct kobj_uevent_env *env);
|
||||
|
||||
static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf)
|
||||
{
|
||||
|
@ -49,6 +50,7 @@ static struct bus_type bcma_bus_type = {
|
|||
.match = bcma_bus_match,
|
||||
.probe = bcma_device_probe,
|
||||
.remove = bcma_device_remove,
|
||||
.uevent = bcma_device_uevent,
|
||||
.dev_attrs = bcma_device_attrs,
|
||||
};
|
||||
|
||||
|
@ -227,6 +229,16 @@ static int bcma_device_remove(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int bcma_device_uevent(struct device *dev, struct kobj_uevent_env *env)
|
||||
{
|
||||
struct bcma_device *core = container_of(dev, struct bcma_device, dev);
|
||||
|
||||
return add_uevent_var(env,
|
||||
"MODALIAS=bcma:m%04Xid%04Xrev%02Xcl%02X",
|
||||
core->id.manuf, core->id.id,
|
||||
core->id.rev, core->id.class);
|
||||
}
|
||||
|
||||
static int __init bcma_modinit(void)
|
||||
{
|
||||
int err;
|
||||
|
|
|
@ -63,6 +63,7 @@ static struct usb_device_id ath3k_table[] = {
|
|||
/* Atheros AR3011 with sflash firmware*/
|
||||
{ USB_DEVICE(0x0CF3, 0x3002) },
|
||||
{ USB_DEVICE(0x13d3, 0x3304) },
|
||||
{ USB_DEVICE(0x0930, 0x0215) },
|
||||
|
||||
/* Atheros AR9285 Malbec with sflash firmware */
|
||||
{ USB_DEVICE(0x03F0, 0x311D) },
|
||||
|
|
|
@ -106,6 +106,7 @@ static struct usb_device_id blacklist_table[] = {
|
|||
/* Atheros 3011 with sflash firmware */
|
||||
{ USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE },
|
||||
{ USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE },
|
||||
{ USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE },
|
||||
|
||||
/* Atheros AR9285 Malbec with sflash firmware */
|
||||
{ USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },
|
||||
|
@ -256,7 +257,9 @@ static void btusb_intr_complete(struct urb *urb)
|
|||
|
||||
err = usb_submit_urb(urb, GFP_ATOMIC);
|
||||
if (err < 0) {
|
||||
if (err != -EPERM)
|
||||
/* -EPERM: urb is being killed;
|
||||
* -ENODEV: device got disconnected */
|
||||
if (err != -EPERM && err != -ENODEV)
|
||||
BT_ERR("%s urb %p failed to resubmit (%d)",
|
||||
hdev->name, urb, -err);
|
||||
usb_unanchor_urb(urb);
|
||||
|
@ -341,7 +344,9 @@ static void btusb_bulk_complete(struct urb *urb)
|
|||
|
||||
err = usb_submit_urb(urb, GFP_ATOMIC);
|
||||
if (err < 0) {
|
||||
if (err != -EPERM)
|
||||
/* -EPERM: urb is being killed;
|
||||
* -ENODEV: device got disconnected */
|
||||
if (err != -EPERM && err != -ENODEV)
|
||||
BT_ERR("%s urb %p failed to resubmit (%d)",
|
||||
hdev->name, urb, -err);
|
||||
usb_unanchor_urb(urb);
|
||||
|
@ -431,7 +436,9 @@ static void btusb_isoc_complete(struct urb *urb)
|
|||
|
||||
err = usb_submit_urb(urb, GFP_ATOMIC);
|
||||
if (err < 0) {
|
||||
if (err != -EPERM)
|
||||
/* -EPERM: urb is being killed;
|
||||
* -ENODEV: device got disconnected */
|
||||
if (err != -EPERM && err != -ENODEV)
|
||||
BT_ERR("%s urb %p failed to resubmit (%d)",
|
||||
hdev->name, urb, -err);
|
||||
usb_unanchor_urb(urb);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/sh_timer.h>
|
||||
|
@ -150,13 +151,13 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
|
|||
|
||||
static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
|
||||
{
|
||||
int ret;
|
||||
int k, ret;
|
||||
|
||||
/* enable clock */
|
||||
ret = clk_enable(p->clk);
|
||||
if (ret) {
|
||||
dev_err(&p->pdev->dev, "cannot enable clock\n");
|
||||
return ret;
|
||||
goto err0;
|
||||
}
|
||||
|
||||
/* make sure channel is disabled */
|
||||
|
@ -174,9 +175,38 @@ static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
|
|||
sh_cmt_write(p, CMCOR, 0xffffffff);
|
||||
sh_cmt_write(p, CMCNT, 0);
|
||||
|
||||
/*
|
||||
* According to the sh73a0 user's manual, as CMCNT can be operated
|
||||
* only by the RCLK (Pseudo 32 KHz), there's one restriction on
|
||||
* modifying CMCNT register; two RCLK cycles are necessary before
|
||||
* this register is either read or any modification of the value
|
||||
* it holds is reflected in the LSI's actual operation.
|
||||
*
|
||||
* While at it, we're supposed to clear out the CMCNT as of this
|
||||
* moment, so make sure it's processed properly here. This will
|
||||
* take RCLKx2 at maximum.
|
||||
*/
|
||||
for (k = 0; k < 100; k++) {
|
||||
if (!sh_cmt_read(p, CMCNT))
|
||||
break;
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
if (sh_cmt_read(p, CMCNT)) {
|
||||
dev_err(&p->pdev->dev, "cannot clear CMCNT\n");
|
||||
ret = -ETIMEDOUT;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
/* enable channel */
|
||||
sh_cmt_start_stop_ch(p, 1);
|
||||
return 0;
|
||||
err1:
|
||||
/* stop clock */
|
||||
clk_disable(p->clk);
|
||||
|
||||
err0:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_cmt_disable(struct sh_cmt_priv *p)
|
||||
|
|
|
@ -499,6 +499,7 @@ void drm_connector_cleanup(struct drm_connector *connector)
|
|||
mutex_lock(&dev->mode_config.mutex);
|
||||
drm_mode_object_put(dev, &connector->base);
|
||||
list_del(&connector->head);
|
||||
dev->mode_config.num_connector--;
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
}
|
||||
EXPORT_SYMBOL(drm_connector_cleanup);
|
||||
|
@ -529,6 +530,7 @@ void drm_encoder_cleanup(struct drm_encoder *encoder)
|
|||
mutex_lock(&dev->mode_config.mutex);
|
||||
drm_mode_object_put(dev, &encoder->base);
|
||||
list_del(&encoder->head);
|
||||
dev->mode_config.num_encoder--;
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
}
|
||||
EXPORT_SYMBOL(drm_encoder_cleanup);
|
||||
|
|
|
@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
|
|||
SOFT_RESET_PA |
|
||||
SOFT_RESET_SH |
|
||||
SOFT_RESET_VGT |
|
||||
SOFT_RESET_SPI |
|
||||
SOFT_RESET_SX));
|
||||
RREG32(GRBM_SOFT_RESET);
|
||||
mdelay(15);
|
||||
|
|
|
@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
|
|||
SOFT_RESET_PA |
|
||||
SOFT_RESET_SH |
|
||||
SOFT_RESET_VGT |
|
||||
SOFT_RESET_SPI |
|
||||
SOFT_RESET_SX));
|
||||
RREG32(GRBM_SOFT_RESET);
|
||||
mdelay(15);
|
||||
|
|
|
@ -3298,6 +3298,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
|
|||
rdev->pdev->subsystem_device == 0x30a4)
|
||||
return;
|
||||
|
||||
/* quirk for rs4xx Compaq Presario V5245EU laptop to make it resume
|
||||
* - it hangs on resume inside the dynclk 1 table.
|
||||
*/
|
||||
if (rdev->family == CHIP_RS480 &&
|
||||
rdev->pdev->subsystem_vendor == 0x103c &&
|
||||
rdev->pdev->subsystem_device == 0x30ae)
|
||||
return;
|
||||
|
||||
/* DYN CLK 1 */
|
||||
table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
|
||||
if (table)
|
||||
|
|
|
@ -503,9 +503,9 @@ static netdev_tx_t ti_hecc_xmit(struct sk_buff *skb, struct net_device *ndev)
|
|||
spin_unlock_irqrestore(&priv->mbx_lock, flags);
|
||||
|
||||
/* Prepare mailbox for transmission */
|
||||
data = cf->can_dlc | (get_tx_head_prio(priv) << 8);
|
||||
if (cf->can_id & CAN_RTR_FLAG) /* Remote transmission request */
|
||||
data |= HECC_CANMCF_RTR;
|
||||
data |= get_tx_head_prio(priv) << 8;
|
||||
hecc_write_mbx(priv, mbxno, HECC_CANMCF, data);
|
||||
|
||||
if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */
|
||||
|
@ -923,6 +923,7 @@ static int ti_hecc_probe(struct platform_device *pdev)
|
|||
priv->can.do_get_state = ti_hecc_get_state;
|
||||
priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
|
||||
|
||||
spin_lock_init(&priv->mbx_lock);
|
||||
ndev->irq = irq->start;
|
||||
ndev->flags |= IFF_ECHO;
|
||||
platform_set_drvdata(pdev, ndev);
|
||||
|
|
|
@ -2452,14 +2452,13 @@ static irqreturn_t cas_interruptN(int irq, void *dev_id)
|
|||
struct net_device *dev = dev_id;
|
||||
struct cas *cp = netdev_priv(dev);
|
||||
unsigned long flags;
|
||||
int ring;
|
||||
int ring = (irq == cp->pci_irq_INTC) ? 2 : 3;
|
||||
u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(ring));
|
||||
|
||||
/* check for shared irq */
|
||||
if (status == 0)
|
||||
return IRQ_NONE;
|
||||
|
||||
ring = (irq == cp->pci_irq_INTC) ? 2 : 3;
|
||||
spin_lock_irqsave(&cp->lock, flags);
|
||||
if (status & INTR_RX_DONE_ALT) { /* handle rx separately */
|
||||
#ifdef USE_NAPI
|
||||
|
|
|
@ -395,7 +395,7 @@ static inline struct sk_buff *ibmveth_rxq_get_buffer(struct ibmveth_adapter *ada
|
|||
}
|
||||
|
||||
/* recycle the current buffer on the rx queue */
|
||||
static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
|
||||
static int ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
|
||||
{
|
||||
u32 q_index = adapter->rx_queue.index;
|
||||
u64 correlator = adapter->rx_queue.queue_addr[q_index].correlator;
|
||||
|
@ -403,6 +403,7 @@ static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
|
|||
unsigned int index = correlator & 0xffffffffUL;
|
||||
union ibmveth_buf_desc desc;
|
||||
unsigned long lpar_rc;
|
||||
int ret = 1;
|
||||
|
||||
BUG_ON(pool >= IBMVETH_NUM_BUFF_POOLS);
|
||||
BUG_ON(index >= adapter->rx_buff_pool[pool].size);
|
||||
|
@ -410,7 +411,7 @@ static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
|
|||
if (!adapter->rx_buff_pool[pool].active) {
|
||||
ibmveth_rxq_harvest_buffer(adapter);
|
||||
ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[pool]);
|
||||
return;
|
||||
goto out;
|
||||
}
|
||||
|
||||
desc.fields.flags_len = IBMVETH_BUF_VALID |
|
||||
|
@ -423,12 +424,16 @@ static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
|
|||
netdev_dbg(adapter->netdev, "h_add_logical_lan_buffer failed "
|
||||
"during recycle rc=%ld", lpar_rc);
|
||||
ibmveth_remove_buffer_from_pool(adapter, adapter->rx_queue.queue_addr[adapter->rx_queue.index].correlator);
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
if (++adapter->rx_queue.index == adapter->rx_queue.num_slots) {
|
||||
adapter->rx_queue.index = 0;
|
||||
adapter->rx_queue.toggle = !adapter->rx_queue.toggle;
|
||||
}
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter)
|
||||
|
@ -1084,8 +1089,9 @@ static int ibmveth_poll(struct napi_struct *napi, int budget)
|
|||
if (rx_flush)
|
||||
ibmveth_flush_buffer(skb->data,
|
||||
length + offset);
|
||||
if (!ibmveth_rxq_recycle_buffer(adapter))
|
||||
kfree_skb(skb);
|
||||
skb = new_skb;
|
||||
ibmveth_rxq_recycle_buffer(adapter);
|
||||
} else {
|
||||
ibmveth_rxq_harvest_buffer(adapter);
|
||||
skb_reserve(skb, offset);
|
||||
|
|
|
@ -25,8 +25,9 @@
|
|||
/* DP83865 phy identifier values */
|
||||
#define DP83865_PHY_ID 0x20005c7a
|
||||
|
||||
#define DP83865_INT_MASK_REG 0x15
|
||||
#define DP83865_INT_MASK_STATUS 0x14
|
||||
#define DP83865_INT_STATUS 0x14
|
||||
#define DP83865_INT_MASK 0x15
|
||||
#define DP83865_INT_CLEAR 0x17
|
||||
|
||||
#define DP83865_INT_REMOTE_FAULT 0x0008
|
||||
#define DP83865_INT_ANE_COMPLETED 0x0010
|
||||
|
@ -68,21 +69,25 @@ static int ns_config_intr(struct phy_device *phydev)
|
|||
int err;
|
||||
|
||||
if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
|
||||
err = phy_write(phydev, DP83865_INT_MASK_REG,
|
||||
err = phy_write(phydev, DP83865_INT_MASK,
|
||||
DP83865_INT_MASK_DEFAULT);
|
||||
else
|
||||
err = phy_write(phydev, DP83865_INT_MASK_REG, 0);
|
||||
err = phy_write(phydev, DP83865_INT_MASK, 0);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int ns_ack_interrupt(struct phy_device *phydev)
|
||||
{
|
||||
int ret = phy_read(phydev, DP83865_INT_MASK_STATUS);
|
||||
int ret = phy_read(phydev, DP83865_INT_STATUS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
/* Clear the interrupt status bit by writing a “1”
|
||||
* to the corresponding bit in INT_CLEAR (2:0 are reserved) */
|
||||
ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
|
||||
|
|
|
@ -31,6 +31,7 @@
|
|||
#include <linux/phy.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/ethtool.h>
|
||||
|
|
|
@ -69,7 +69,7 @@ static int ar9003_hw_power_interpolate(int32_t x,
|
|||
static const struct ar9300_eeprom ar9300_default = {
|
||||
.eepromVersion = 2,
|
||||
.templateVersion = 2,
|
||||
.macAddr = {1, 2, 3, 4, 5, 6},
|
||||
.macAddr = {0, 2, 3, 4, 5, 6},
|
||||
.custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||
.baseEepHeader = {
|
||||
|
|
|
@ -2283,7 +2283,11 @@ static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
|
|||
|
||||
mutex_lock(&sc->mutex);
|
||||
ah->coverage_class = coverage_class;
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
ath9k_hw_init_global_settings(ah);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
}
|
||||
|
||||
|
|
|
@ -1066,8 +1066,10 @@ static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
|||
* the high througput speed in 802.11n networks.
|
||||
*/
|
||||
|
||||
if (!is_main_vif(ar, vif))
|
||||
if (!is_main_vif(ar, vif)) {
|
||||
mutex_lock(&ar->mutex);
|
||||
goto err_softw;
|
||||
}
|
||||
|
||||
/*
|
||||
* While the hardware supports *catch-all* key, for offloading
|
||||
|
|
|
@ -871,18 +871,8 @@ int rt2x00usb_suspend(struct usb_interface *usb_intf, pm_message_t state)
|
|||
{
|
||||
struct ieee80211_hw *hw = usb_get_intfdata(usb_intf);
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
int retval;
|
||||
|
||||
retval = rt2x00lib_suspend(rt2x00dev, state);
|
||||
if (retval)
|
||||
return retval;
|
||||
|
||||
/*
|
||||
* Decrease usbdev refcount.
|
||||
*/
|
||||
usb_put_dev(interface_to_usbdev(usb_intf));
|
||||
|
||||
return 0;
|
||||
return rt2x00lib_suspend(rt2x00dev, state);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00usb_suspend);
|
||||
|
||||
|
@ -891,8 +881,6 @@ int rt2x00usb_resume(struct usb_interface *usb_intf)
|
|||
struct ieee80211_hw *hw = usb_get_intfdata(usb_intf);
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
|
||||
usb_get_dev(interface_to_usbdev(usb_intf));
|
||||
|
||||
return rt2x00lib_resume(rt2x00dev);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00usb_resume);
|
||||
|
|
|
@ -4283,6 +4283,7 @@ int wl1271_init_ieee80211(struct wl1271 *wl)
|
|||
wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
|
||||
wl->hw->wiphy->max_scan_ssids = 1;
|
||||
wl->hw->wiphy->max_sched_scan_ssids = 1;
|
||||
/*
|
||||
* Maximum length of elements in scanning probe request templates
|
||||
* should be the maximum length possible for a template, without
|
||||
|
|
|
@ -164,7 +164,7 @@ static int wl1271_sdio_power_on(struct wl1271 *wl)
|
|||
/* If enabled, tell runtime PM not to power off the card */
|
||||
if (pm_runtime_enabled(&func->dev)) {
|
||||
ret = pm_runtime_get_sync(&func->dev);
|
||||
if (ret)
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
} else {
|
||||
/* Runtime PM is disabled: power up the card manually */
|
||||
|
|
|
@ -36,7 +36,6 @@ enum wl1271_tm_commands {
|
|||
WL1271_TM_CMD_TEST,
|
||||
WL1271_TM_CMD_INTERROGATE,
|
||||
WL1271_TM_CMD_CONFIGURE,
|
||||
WL1271_TM_CMD_NVS_PUSH,
|
||||
WL1271_TM_CMD_SET_PLT_MODE,
|
||||
WL1271_TM_CMD_RECOVER,
|
||||
|
||||
|
@ -190,48 +189,6 @@ static int wl1271_tm_cmd_configure(struct wl1271 *wl, struct nlattr *tb[])
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int wl1271_tm_cmd_nvs_push(struct wl1271 *wl, struct nlattr *tb[])
|
||||
{
|
||||
int ret = 0;
|
||||
size_t len;
|
||||
void *buf;
|
||||
|
||||
wl1271_debug(DEBUG_TESTMODE, "testmode cmd nvs push");
|
||||
|
||||
if (!tb[WL1271_TM_ATTR_DATA])
|
||||
return -EINVAL;
|
||||
|
||||
buf = nla_data(tb[WL1271_TM_ATTR_DATA]);
|
||||
len = nla_len(tb[WL1271_TM_ATTR_DATA]);
|
||||
|
||||
mutex_lock(&wl->mutex);
|
||||
|
||||
kfree(wl->nvs);
|
||||
|
||||
if ((wl->chip.id == CHIP_ID_1283_PG20) &&
|
||||
(len != sizeof(struct wl128x_nvs_file)))
|
||||
return -EINVAL;
|
||||
else if (len != sizeof(struct wl1271_nvs_file))
|
||||
return -EINVAL;
|
||||
|
||||
wl->nvs = kzalloc(len, GFP_KERNEL);
|
||||
if (!wl->nvs) {
|
||||
wl1271_error("could not allocate memory for the nvs file");
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
memcpy(wl->nvs, buf, len);
|
||||
wl->nvs_len = len;
|
||||
|
||||
wl1271_debug(DEBUG_TESTMODE, "testmode pushed nvs");
|
||||
|
||||
out:
|
||||
mutex_unlock(&wl->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wl1271_tm_cmd_set_plt_mode(struct wl1271 *wl, struct nlattr *tb[])
|
||||
{
|
||||
u32 val;
|
||||
|
@ -288,8 +245,6 @@ int wl1271_tm_cmd(struct ieee80211_hw *hw, void *data, int len)
|
|||
return wl1271_tm_cmd_interrogate(wl, tb);
|
||||
case WL1271_TM_CMD_CONFIGURE:
|
||||
return wl1271_tm_cmd_configure(wl, tb);
|
||||
case WL1271_TM_CMD_NVS_PUSH:
|
||||
return wl1271_tm_cmd_nvs_push(wl, tb);
|
||||
case WL1271_TM_CMD_SET_PLT_MODE:
|
||||
return wl1271_tm_cmd_set_plt_mode(wl, tb);
|
||||
case WL1271_TM_CMD_RECOVER:
|
||||
|
|
|
@ -186,6 +186,9 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
|
|||
!defined(CONFIG_CPU_SUBTYPE_SH7709)
|
||||
[IRQ_TYPE_LEVEL_HIGH] = VALID(3),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_SH7372)
|
||||
[IRQ_TYPE_EDGE_BOTH] = VALID(4),
|
||||
#endif
|
||||
};
|
||||
|
||||
static int intc_set_type(struct irq_data *data, unsigned int type)
|
||||
|
|
|
@ -47,6 +47,7 @@
|
|||
#include <linux/ctype.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
|
@ -95,6 +96,12 @@ struct sci_port {
|
|||
#endif
|
||||
|
||||
struct notifier_block freq_transition;
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
|
||||
unsigned short saved_smr;
|
||||
unsigned short saved_fcr;
|
||||
unsigned char saved_brr;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Function prototypes */
|
||||
|
@ -1076,7 +1083,7 @@ static unsigned int sci_get_mctrl(struct uart_port *port)
|
|||
/* This routine is used for getting signals of: DTR, DCD, DSR, RI,
|
||||
and CTS/RTS */
|
||||
|
||||
return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
|
||||
return TIOCM_DTR | TIOCM_RTS | TIOCM_CTS | TIOCM_DSR;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
|
@ -1633,11 +1640,25 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
|
|||
return ((freq + 16 * bps) / (32 * bps) - 1);
|
||||
}
|
||||
|
||||
static void sci_reset(struct uart_port *port)
|
||||
{
|
||||
unsigned int status;
|
||||
|
||||
do {
|
||||
status = sci_in(port, SCxSR);
|
||||
} while (!(status & SCxSR_TEND(port)));
|
||||
|
||||
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
|
||||
|
||||
if (port->type != PORT_SCI)
|
||||
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
||||
}
|
||||
|
||||
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct ktermios *old)
|
||||
{
|
||||
struct sci_port *s = to_sci_port(port);
|
||||
unsigned int status, baud, smr_val, max_baud;
|
||||
unsigned int baud, smr_val, max_baud;
|
||||
int t = -1;
|
||||
u16 scfcr = 0;
|
||||
|
||||
|
@ -1657,14 +1678,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
|
||||
sci_port_enable(s);
|
||||
|
||||
do {
|
||||
status = sci_in(port, SCxSR);
|
||||
} while (!(status & SCxSR_TEND(port)));
|
||||
|
||||
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
|
||||
|
||||
if (port->type != PORT_SCI)
|
||||
sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST);
|
||||
sci_reset(port);
|
||||
|
||||
smr_val = sci_in(port, SCSMR) & 3;
|
||||
|
||||
|
@ -2037,7 +2051,8 @@ static int __devinit serial_console_setup(struct console *co, char *options)
|
|||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
|
||||
/* TODO: disable clock */
|
||||
sci_port_disable(sci_port);
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
|
@ -2080,6 +2095,36 @@ static int __devinit sci_probe_earlyprintk(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define uart_console(port) ((port)->cons->index == (port)->line)
|
||||
|
||||
static int sci_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct sci_port *sci_port = dev_get_drvdata(dev);
|
||||
struct uart_port *port = &sci_port->port;
|
||||
|
||||
if (uart_console(port)) {
|
||||
sci_port->saved_smr = sci_in(port, SCSMR);
|
||||
sci_port->saved_brr = sci_in(port, SCBRR);
|
||||
sci_port->saved_fcr = sci_in(port, SCFCR);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sci_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct sci_port *sci_port = dev_get_drvdata(dev);
|
||||
struct uart_port *port = &sci_port->port;
|
||||
|
||||
if (uart_console(port)) {
|
||||
sci_reset(port);
|
||||
sci_out(port, SCSMR, sci_port->saved_smr);
|
||||
sci_out(port, SCBRR, sci_port->saved_brr);
|
||||
sci_out(port, SCFCR, sci_port->saved_fcr);
|
||||
sci_out(port, SCSCR, sci_port->cfg->scscr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define SCI_CONSOLE (&serial_console)
|
||||
|
||||
#else
|
||||
|
@ -2089,6 +2134,8 @@ static inline int __devinit sci_probe_earlyprintk(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
#define SCI_CONSOLE NULL
|
||||
#define sci_runtime_suspend NULL
|
||||
#define sci_runtime_resume NULL
|
||||
|
||||
#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
|
||||
|
||||
|
@ -2204,6 +2251,8 @@ static int sci_resume(struct device *dev)
|
|||
}
|
||||
|
||||
static const struct dev_pm_ops sci_dev_pm_ops = {
|
||||
.runtime_suspend = sci_runtime_suspend,
|
||||
.runtime_resume = sci_runtime_resume,
|
||||
.suspend = sci_suspend,
|
||||
.resume = sci_resume,
|
||||
};
|
||||
|
|
|
@ -1865,6 +1865,9 @@ struct wiphy {
|
|||
* you need use set_wiphy_dev() (see below) */
|
||||
struct device dev;
|
||||
|
||||
/* protects ->resume, ->suspend sysfs callbacks against unregister hw */
|
||||
bool registered;
|
||||
|
||||
/* dir in debugfs: ieee80211/<wiphyname> */
|
||||
struct dentry *debugfsdir;
|
||||
|
||||
|
|
|
@ -12,7 +12,7 @@ lib-y := ctype.o string.o vsprintf.o cmdline.o \
|
|||
idr.o int_sqrt.o extable.o prio_tree.o \
|
||||
sha1.o md5.o irq_regs.o reciprocal_div.o argv_split.o \
|
||||
proportions.o prio_heap.o ratelimit.o show_mem.o \
|
||||
is_single_threaded.o plist.o decompress.o find_next_bit.o
|
||||
is_single_threaded.o plist.o decompress.o
|
||||
|
||||
lib-$(CONFIG_MMU) += ioremap.o
|
||||
lib-$(CONFIG_SMP) += cpumask.o
|
||||
|
@ -22,7 +22,7 @@ lib-y += kobject.o kref.o klist.o
|
|||
obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
|
||||
bust_spinlocks.o hexdump.o kasprintf.o bitmap.o scatterlist.o \
|
||||
string_helpers.o gcd.o lcm.o list_sort.o uuid.o flex_array.o \
|
||||
bsearch.o find_last_bit.o
|
||||
bsearch.o find_last_bit.o find_next_bit.o
|
||||
obj-y += kstrtox.o
|
||||
obj-$(CONFIG_TEST_KSTRTOX) += test-kstrtox.o
|
||||
|
||||
|
|
|
@ -494,9 +494,8 @@ int bt_sock_wait_state(struct sock *sk, int state, unsigned long timeo)
|
|||
BT_DBG("sk %p", sk);
|
||||
|
||||
add_wait_queue(sk_sleep(sk), &wait);
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
while (sk->sk_state != state) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
if (!timeo) {
|
||||
err = -EINPROGRESS;
|
||||
break;
|
||||
|
@ -510,12 +509,13 @@ int bt_sock_wait_state(struct sock *sk, int state, unsigned long timeo)
|
|||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
err = sock_error(sk);
|
||||
if (err)
|
||||
break;
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -155,6 +155,7 @@ struct bnep_session {
|
|||
unsigned int role;
|
||||
unsigned long state;
|
||||
unsigned long flags;
|
||||
atomic_t terminate;
|
||||
struct task_struct *task;
|
||||
|
||||
struct ethhdr eh;
|
||||
|
|
|
@ -484,9 +484,11 @@ static int bnep_session(void *arg)
|
|||
|
||||
init_waitqueue_entry(&wait, current);
|
||||
add_wait_queue(sk_sleep(sk), &wait);
|
||||
while (!kthread_should_stop()) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
if (atomic_read(&s->terminate))
|
||||
break;
|
||||
/* RX */
|
||||
while ((skb = skb_dequeue(&sk->sk_receive_queue))) {
|
||||
skb_orphan(skb);
|
||||
|
@ -504,7 +506,7 @@ static int bnep_session(void *arg)
|
|||
|
||||
schedule();
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
|
||||
/* Cleanup session */
|
||||
|
@ -640,9 +642,10 @@ int bnep_del_connection(struct bnep_conndel_req *req)
|
|||
down_read(&bnep_session_sem);
|
||||
|
||||
s = __bnep_get_session(req->dst);
|
||||
if (s)
|
||||
kthread_stop(s->task);
|
||||
else
|
||||
if (s) {
|
||||
atomic_inc(&s->terminate);
|
||||
wake_up_process(s->task);
|
||||
} else
|
||||
err = -ENOENT;
|
||||
|
||||
up_read(&bnep_session_sem);
|
||||
|
|
|
@ -386,7 +386,8 @@ static void cmtp_reset_ctr(struct capi_ctr *ctrl)
|
|||
|
||||
capi_ctr_down(ctrl);
|
||||
|
||||
kthread_stop(session->task);
|
||||
atomic_inc(&session->terminate);
|
||||
wake_up_process(session->task);
|
||||
}
|
||||
|
||||
static void cmtp_register_appl(struct capi_ctr *ctrl, __u16 appl, capi_register_params *rp)
|
||||
|
|
|
@ -81,6 +81,7 @@ struct cmtp_session {
|
|||
|
||||
char name[BTNAMSIZ];
|
||||
|
||||
atomic_t terminate;
|
||||
struct task_struct *task;
|
||||
|
||||
wait_queue_head_t wait;
|
||||
|
|
|
@ -292,9 +292,11 @@ static int cmtp_session(void *arg)
|
|||
|
||||
init_waitqueue_entry(&wait, current);
|
||||
add_wait_queue(sk_sleep(sk), &wait);
|
||||
while (!kthread_should_stop()) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
if (atomic_read(&session->terminate))
|
||||
break;
|
||||
if (sk->sk_state != BT_CONNECTED)
|
||||
break;
|
||||
|
||||
|
@ -307,7 +309,7 @@ static int cmtp_session(void *arg)
|
|||
|
||||
schedule();
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
|
||||
down_write(&cmtp_session_sem);
|
||||
|
@ -380,16 +382,17 @@ int cmtp_add_connection(struct cmtp_connadd_req *req, struct socket *sock)
|
|||
|
||||
if (!(session->flags & (1 << CMTP_LOOPBACK))) {
|
||||
err = cmtp_attach_device(session);
|
||||
if (err < 0)
|
||||
goto detach;
|
||||
if (err < 0) {
|
||||
atomic_inc(&session->terminate);
|
||||
wake_up_process(session->task);
|
||||
up_write(&cmtp_session_sem);
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
up_write(&cmtp_session_sem);
|
||||
return 0;
|
||||
|
||||
detach:
|
||||
cmtp_detach_device(session);
|
||||
|
||||
unlink:
|
||||
__cmtp_unlink_session(session);
|
||||
|
||||
|
@ -414,7 +417,8 @@ int cmtp_del_connection(struct cmtp_conndel_req *req)
|
|||
skb_queue_purge(&session->transmit);
|
||||
|
||||
/* Stop session thread */
|
||||
kthread_stop(session->task);
|
||||
atomic_inc(&session->terminate);
|
||||
wake_up_process(session->task);
|
||||
} else
|
||||
err = -ENOENT;
|
||||
|
||||
|
|
|
@ -1209,7 +1209,6 @@ static void hci_cmd_timer(unsigned long arg)
|
|||
|
||||
BT_ERR("%s command tx timeout", hdev->name);
|
||||
atomic_set(&hdev->cmd_cnt, 1);
|
||||
clear_bit(HCI_RESET, &hdev->flags);
|
||||
tasklet_schedule(&hdev->cmd_task);
|
||||
}
|
||||
|
||||
|
@ -1327,7 +1326,7 @@ int hci_blacklist_add(struct hci_dev *hdev, bdaddr_t *bdaddr)
|
|||
|
||||
entry = kzalloc(sizeof(struct bdaddr_list), GFP_KERNEL);
|
||||
if (!entry) {
|
||||
return -ENOMEM;
|
||||
err = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
@ -2408,7 +2407,10 @@ static void hci_cmd_task(unsigned long arg)
|
|||
if (hdev->sent_cmd) {
|
||||
atomic_dec(&hdev->cmd_cnt);
|
||||
hci_send_frame(skb);
|
||||
mod_timer(&hdev->cmd_timer,
|
||||
if (test_bit(HCI_RESET, &hdev->flags))
|
||||
del_timer(&hdev->cmd_timer);
|
||||
else
|
||||
mod_timer(&hdev->cmd_timer,
|
||||
jiffies + msecs_to_jiffies(HCI_CMD_TIMEOUT));
|
||||
} else {
|
||||
skb_queue_head(&hdev->cmd_q, skb);
|
||||
|
|
|
@ -764,6 +764,7 @@ static int hidp_session(void *arg)
|
|||
|
||||
up_write(&hidp_session_sem);
|
||||
|
||||
kfree(session->rd_data);
|
||||
kfree(session);
|
||||
return 0;
|
||||
}
|
||||
|
@ -841,7 +842,8 @@ static int hidp_setup_input(struct hidp_session *session,
|
|||
|
||||
err = input_register_device(input);
|
||||
if (err < 0) {
|
||||
hci_conn_put_device(session->conn);
|
||||
input_free_device(input);
|
||||
session->input = NULL;
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -1044,8 +1046,12 @@ int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock,
|
|||
}
|
||||
|
||||
err = hid_add_device(session->hid);
|
||||
if (err < 0)
|
||||
goto err_add_device;
|
||||
if (err < 0) {
|
||||
atomic_inc(&session->terminate);
|
||||
wake_up_process(session->task);
|
||||
up_write(&hidp_session_sem);
|
||||
return err;
|
||||
}
|
||||
|
||||
if (session->input) {
|
||||
hidp_send_ctrl_message(session,
|
||||
|
@ -1059,12 +1065,6 @@ int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock,
|
|||
up_write(&hidp_session_sem);
|
||||
return 0;
|
||||
|
||||
err_add_device:
|
||||
hid_destroy_device(session->hid);
|
||||
session->hid = NULL;
|
||||
atomic_inc(&session->terminate);
|
||||
wake_up_process(session->task);
|
||||
|
||||
unlink:
|
||||
hidp_del_timer(session);
|
||||
|
||||
|
@ -1090,7 +1090,6 @@ int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock,
|
|||
failed:
|
||||
up_write(&hidp_session_sem);
|
||||
|
||||
input_free_device(session->input);
|
||||
kfree(session);
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -1159,9 +1159,8 @@ int __l2cap_wait_ack(struct sock *sk)
|
|||
int timeo = HZ/5;
|
||||
|
||||
add_wait_queue(sk_sleep(sk), &wait);
|
||||
while ((chan->unacked_frames > 0 && chan->conn)) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
while (chan->unacked_frames > 0 && chan->conn) {
|
||||
if (!timeo)
|
||||
timeo = HZ/5;
|
||||
|
||||
|
@ -1173,6 +1172,7 @@ int __l2cap_wait_ack(struct sock *sk)
|
|||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
err = sock_error(sk);
|
||||
if (err)
|
||||
|
|
|
@ -235,39 +235,39 @@ static int l2cap_sock_accept(struct socket *sock, struct socket *newsock, int fl
|
|||
|
||||
lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
goto done;
|
||||
}
|
||||
|
||||
timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK);
|
||||
|
||||
BT_DBG("sk %p timeo %ld", sk, timeo);
|
||||
|
||||
/* Wait for an incoming connection. (wake-one). */
|
||||
add_wait_queue_exclusive(sk_sleep(sk), &wait);
|
||||
while (!(nsk = bt_accept_dequeue(sk, newsock))) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
break;
|
||||
}
|
||||
|
||||
nsk = bt_accept_dequeue(sk, newsock);
|
||||
if (nsk)
|
||||
break;
|
||||
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
if (signal_pending(current)) {
|
||||
err = sock_intr_errno(timeo);
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
|
||||
if (err)
|
||||
|
@ -993,7 +993,7 @@ static struct sock *l2cap_sock_alloc(struct net *net, struct socket *sock, int p
|
|||
INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
|
||||
|
||||
sk->sk_destruct = l2cap_sock_destruct;
|
||||
sk->sk_sndtimeo = msecs_to_jiffies(L2CAP_CONN_TIMEOUT);
|
||||
sk->sk_sndtimeo = L2CAP_CONN_TIMEOUT;
|
||||
|
||||
sock_reset_flag(sk, SOCK_ZAPPED);
|
||||
|
||||
|
|
|
@ -62,7 +62,6 @@ static DEFINE_MUTEX(rfcomm_mutex);
|
|||
#define rfcomm_lock() mutex_lock(&rfcomm_mutex)
|
||||
#define rfcomm_unlock() mutex_unlock(&rfcomm_mutex)
|
||||
|
||||
static unsigned long rfcomm_event;
|
||||
|
||||
static LIST_HEAD(session_list);
|
||||
|
||||
|
@ -120,7 +119,6 @@ static inline void rfcomm_schedule(void)
|
|||
{
|
||||
if (!rfcomm_thread)
|
||||
return;
|
||||
set_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event);
|
||||
wake_up_process(rfcomm_thread);
|
||||
}
|
||||
|
||||
|
@ -2038,19 +2036,18 @@ static int rfcomm_run(void *unused)
|
|||
|
||||
rfcomm_add_listener(BDADDR_ANY);
|
||||
|
||||
while (!kthread_should_stop()) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
if (!test_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event)) {
|
||||
/* No pending events. Let's sleep.
|
||||
* Incoming connections and data will wake us up. */
|
||||
schedule();
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
|
||||
if (kthread_should_stop())
|
||||
break;
|
||||
|
||||
/* Process stuff */
|
||||
clear_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event);
|
||||
rfcomm_process_sessions();
|
||||
|
||||
schedule();
|
||||
}
|
||||
__set_current_state(TASK_RUNNING);
|
||||
|
||||
rfcomm_kill_listener();
|
||||
|
||||
|
|
|
@ -485,11 +485,6 @@ static int rfcomm_sock_accept(struct socket *sock, struct socket *newsock, int f
|
|||
|
||||
lock_sock(sk);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (sk->sk_type != SOCK_STREAM) {
|
||||
err = -EINVAL;
|
||||
goto done;
|
||||
|
@ -501,28 +496,33 @@ static int rfcomm_sock_accept(struct socket *sock, struct socket *newsock, int f
|
|||
|
||||
/* Wait for an incoming connection. (wake-one). */
|
||||
add_wait_queue_exclusive(sk_sleep(sk), &wait);
|
||||
while (!(nsk = bt_accept_dequeue(sk, newsock))) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
break;
|
||||
}
|
||||
|
||||
nsk = bt_accept_dequeue(sk, newsock);
|
||||
if (nsk)
|
||||
break;
|
||||
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
if (signal_pending(current)) {
|
||||
err = sock_intr_errno(timeo);
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
|
||||
if (err)
|
||||
|
|
|
@ -564,39 +564,39 @@ static int sco_sock_accept(struct socket *sock, struct socket *newsock, int flag
|
|||
|
||||
lock_sock(sk);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
goto done;
|
||||
}
|
||||
|
||||
timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK);
|
||||
|
||||
BT_DBG("sk %p timeo %ld", sk, timeo);
|
||||
|
||||
/* Wait for an incoming connection. (wake-one). */
|
||||
add_wait_queue_exclusive(sk_sleep(sk), &wait);
|
||||
while (!(ch = bt_accept_dequeue(sk, newsock))) {
|
||||
while (1) {
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
|
||||
if (sk->sk_state != BT_LISTEN) {
|
||||
err = -EBADFD;
|
||||
break;
|
||||
}
|
||||
|
||||
ch = bt_accept_dequeue(sk, newsock);
|
||||
if (ch)
|
||||
break;
|
||||
|
||||
if (!timeo) {
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
if (signal_pending(current)) {
|
||||
err = sock_intr_errno(timeo);
|
||||
break;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
timeo = schedule_timeout(timeo);
|
||||
lock_sock(sk);
|
||||
}
|
||||
set_current_state(TASK_RUNNING);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(sk_sleep(sk), &wait);
|
||||
|
||||
if (err)
|
||||
|
|
|
@ -1456,7 +1456,7 @@ static int br_multicast_ipv6_rcv(struct net_bridge *br,
|
|||
{
|
||||
struct sk_buff *skb2;
|
||||
const struct ipv6hdr *ip6h;
|
||||
struct icmp6hdr *icmp6h;
|
||||
u8 icmp6_type;
|
||||
u8 nexthdr;
|
||||
unsigned len;
|
||||
int offset;
|
||||
|
@ -1502,9 +1502,9 @@ static int br_multicast_ipv6_rcv(struct net_bridge *br,
|
|||
__skb_pull(skb2, offset);
|
||||
skb_reset_transport_header(skb2);
|
||||
|
||||
icmp6h = icmp6_hdr(skb2);
|
||||
icmp6_type = icmp6_hdr(skb2)->icmp6_type;
|
||||
|
||||
switch (icmp6h->icmp6_type) {
|
||||
switch (icmp6_type) {
|
||||
case ICMPV6_MGM_QUERY:
|
||||
case ICMPV6_MGM_REPORT:
|
||||
case ICMPV6_MGM_REDUCTION:
|
||||
|
@ -1520,16 +1520,23 @@ static int br_multicast_ipv6_rcv(struct net_bridge *br,
|
|||
err = pskb_trim_rcsum(skb2, len);
|
||||
if (err)
|
||||
goto out;
|
||||
err = -EINVAL;
|
||||
}
|
||||
|
||||
ip6h = ipv6_hdr(skb2);
|
||||
|
||||
switch (skb2->ip_summed) {
|
||||
case CHECKSUM_COMPLETE:
|
||||
if (!csum_fold(skb2->csum))
|
||||
if (!csum_ipv6_magic(&ip6h->saddr, &ip6h->daddr, skb2->len,
|
||||
IPPROTO_ICMPV6, skb2->csum))
|
||||
break;
|
||||
/*FALLTHROUGH*/
|
||||
case CHECKSUM_NONE:
|
||||
skb2->csum = 0;
|
||||
if (skb_checksum_complete(skb2))
|
||||
skb2->csum = ~csum_unfold(csum_ipv6_magic(&ip6h->saddr,
|
||||
&ip6h->daddr,
|
||||
skb2->len,
|
||||
IPPROTO_ICMPV6, 0));
|
||||
if (__skb_checksum_complete(skb2))
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
@ -1537,7 +1544,7 @@ static int br_multicast_ipv6_rcv(struct net_bridge *br,
|
|||
|
||||
BR_INPUT_SKB_CB(skb)->igmp = 1;
|
||||
|
||||
switch (icmp6h->icmp6_type) {
|
||||
switch (icmp6_type) {
|
||||
case ICMPV6_MGM_REPORT:
|
||||
{
|
||||
struct mld_msg *mld;
|
||||
|
|
|
@ -1319,11 +1319,15 @@ static void neigh_proxy_process(unsigned long arg)
|
|||
|
||||
if (tdif <= 0) {
|
||||
struct net_device *dev = skb->dev;
|
||||
|
||||
__skb_unlink(skb, &tbl->proxy_queue);
|
||||
if (tbl->proxy_redo && netif_running(dev))
|
||||
if (tbl->proxy_redo && netif_running(dev)) {
|
||||
rcu_read_lock();
|
||||
tbl->proxy_redo(skb);
|
||||
else
|
||||
rcu_read_unlock();
|
||||
} else {
|
||||
kfree_skb(skb);
|
||||
}
|
||||
|
||||
dev_put(dev);
|
||||
} else if (!sched_next || tdif < sched_next)
|
||||
|
|
|
@ -558,13 +558,14 @@ int __netpoll_rx(struct sk_buff *skb)
|
|||
if (skb_shared(skb))
|
||||
goto out;
|
||||
|
||||
iph = (struct iphdr *)skb->data;
|
||||
if (!pskb_may_pull(skb, sizeof(struct iphdr)))
|
||||
goto out;
|
||||
iph = (struct iphdr *)skb->data;
|
||||
if (iph->ihl < 5 || iph->version != 4)
|
||||
goto out;
|
||||
if (!pskb_may_pull(skb, iph->ihl*4))
|
||||
goto out;
|
||||
iph = (struct iphdr *)skb->data;
|
||||
if (ip_fast_csum((u8 *)iph, iph->ihl) != 0)
|
||||
goto out;
|
||||
|
||||
|
@ -579,6 +580,7 @@ int __netpoll_rx(struct sk_buff *skb)
|
|||
if (pskb_trim_rcsum(skb, len))
|
||||
goto out;
|
||||
|
||||
iph = (struct iphdr *)skb->data;
|
||||
if (iph->protocol != IPPROTO_UDP)
|
||||
goto out;
|
||||
|
||||
|
|
|
@ -767,7 +767,7 @@ static int igmp_xmarksources(struct ip_mc_list *pmc, int nsrcs, __be32 *srcs)
|
|||
break;
|
||||
for (i=0; i<nsrcs; i++) {
|
||||
/* skip inactive filters */
|
||||
if (pmc->sfcount[MCAST_INCLUDE] ||
|
||||
if (psf->sf_count[MCAST_INCLUDE] ||
|
||||
pmc->sfcount[MCAST_EXCLUDE] !=
|
||||
psf->sf_count[MCAST_EXCLUDE])
|
||||
continue;
|
||||
|
|
|
@ -1059,7 +1059,7 @@ static int mld_xmarksources(struct ifmcaddr6 *pmc, int nsrcs,
|
|||
break;
|
||||
for (i=0; i<nsrcs; i++) {
|
||||
/* skip inactive filters */
|
||||
if (pmc->mca_sfcount[MCAST_INCLUDE] ||
|
||||
if (psf->sf_count[MCAST_INCLUDE] ||
|
||||
pmc->mca_sfcount[MCAST_EXCLUDE] !=
|
||||
psf->sf_count[MCAST_EXCLUDE])
|
||||
continue;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue