[SPARC64]: Correctable ECC errors cannot occur at trap level > 0.
The are distrupting, which by the sparc v9 definition means they can only occur when interrupts are enabled in the %pstate register. This never occurs in any of the trap handling code running at trap levels > 0. So just mark it as an unexpected trap. This allows us to kill off the cee_stuff member of struct thread_info. Signed-off-by: David S. Miller <davem@davemloft.net>
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3 changed files with 4 additions and 24 deletions
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@ -2169,7 +2169,6 @@ void __init trap_init(void)
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TI_KERN_CNTD0 != offsetof(struct thread_info, kernel_cntd0) ||
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TI_KERN_CNTD1 != offsetof(struct thread_info, kernel_cntd1) ||
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TI_PCR != offsetof(struct thread_info, pcr_reg) ||
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TI_CEE_STUFF != offsetof(struct thread_info, cee_stuff) ||
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TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||
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TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||
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TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||
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@ -222,23 +222,7 @@ tl1_resv05c: BTRAPTL1(0x5c) BTRAPTL1(0x5d) BTRAPTL1(0x5e) BTRAPTL1(0x5f)
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tl1_ivec: TRAP_IVEC
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tl1_paw: TRAPTL1(do_paw_tl1)
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tl1_vaw: TRAPTL1(do_vaw_tl1)
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/* The grotty trick to save %g1 into current->thread.cee_stuff
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* is because when we take this trap we could be interrupting
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* trap code already using the trap alternate global registers.
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*
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* We cross our fingers and pray that this store/load does
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* not cause yet another CEE trap.
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*/
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tl1_cee: membar #Sync
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stx %g1, [%g6 + TI_CEE_STUFF]
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ldxa [%g0] ASI_AFSR, %g1
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membar #Sync
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stxa %g1, [%g0] ASI_AFSR
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membar #Sync
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ldx [%g6 + TI_CEE_STUFF], %g1
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retry
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tl1_cee: BTRAPTL1(0x63)
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tl1_iamiss: BTRAPTL1(0x64) BTRAPTL1(0x65) BTRAPTL1(0x66) BTRAPTL1(0x67)
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tl1_damiss:
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#include "dtlb_miss.S"
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@ -64,8 +64,6 @@ struct thread_info {
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__u64 kernel_cntd0, kernel_cntd1;
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__u64 pcr_reg;
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__u64 cee_stuff;
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struct restart_block restart_block;
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struct pt_regs *kern_una_regs;
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@ -104,10 +102,9 @@ struct thread_info {
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#define TI_KERN_CNTD0 0x00000480
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#define TI_KERN_CNTD1 0x00000488
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#define TI_PCR 0x00000490
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#define TI_CEE_STUFF 0x00000498
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#define TI_RESTART_BLOCK 0x000004a0
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#define TI_KUNA_REGS 0x000004c8
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#define TI_KUNA_INSN 0x000004d0
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#define TI_RESTART_BLOCK 0x00000498
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#define TI_KUNA_REGS 0x000004c0
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#define TI_KUNA_INSN 0x000004c8
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#define TI_FPREGS 0x00000500
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/* We embed this in the uppermost byte of thread_info->flags */
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