ARM: clcd: add method for describing display capabilities
The ARM CLCD PL110 controller in TFT mode provides two output formats based on whether the controller is in 24bpp mode or not - either 5551 or 888. PL111 augments this with a 444 and 565 modes. Some implementations provide an external MUX on the PL110 output to reassign the bits to achieve 565 mode. Provide a system of capability flags to allow the CLCD driver to work out what is supported by each panel and board, and therefore which display formats are permitted. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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9c49e4ab84
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2 changed files with 153 additions and 32 deletions
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@ -120,8 +120,23 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
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static int
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clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
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{
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u32 caps;
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int ret = 0;
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if (fb->panel->caps && fb->board->caps)
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caps = fb->panel->caps & fb->board->caps;
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else {
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/* Old way of specifying what can be used */
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caps = fb->panel->cntl & CNTL_BGR ?
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CLCD_CAP_BGR : CLCD_CAP_RGB;
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/* But mask out 444 modes as they weren't supported */
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caps &= ~CLCD_CAP_444;
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}
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/* Only TFT panels can do RGB888/BGR888 */
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if (!(fb->panel->cntl & CNTL_LCDTFT))
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caps &= ~CLCD_CAP_888;
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memset(&var->transp, 0, sizeof(var->transp));
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var->red.msb_right = 0;
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@ -133,6 +148,13 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
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case 2:
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case 4:
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case 8:
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/* If we can't do 5551, reject */
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caps &= CLCD_CAP_5551;
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if (!caps) {
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ret = -EINVAL;
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break;
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}
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var->red.length = var->bits_per_pixel;
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var->red.offset = 0;
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var->green.length = var->bits_per_pixel;
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@ -140,23 +162,61 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
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var->blue.length = var->bits_per_pixel;
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var->blue.offset = 0;
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break;
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case 16:
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var->red.length = 5;
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var->blue.length = 5;
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/*
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* Green length can be 5 or 6 depending whether
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* we're operating in RGB555 or RGB565 mode.
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*/
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if (var->green.length != 5 && var->green.length != 6)
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var->green.length = 6;
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break;
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case 32:
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if (fb->panel->cntl & CNTL_LCDTFT) {
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var->red.length = 8;
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var->green.length = 8;
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var->blue.length = 8;
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/* If we can't do 444, 5551 or 565, reject */
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if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
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ret = -EINVAL;
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break;
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}
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/*
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* Green length can be 4, 5 or 6 depending whether
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* we're operating in 444, 5551 or 565 mode.
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*/
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if (var->green.length == 4 && caps & CLCD_CAP_444)
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caps &= CLCD_CAP_444;
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if (var->green.length == 5 && caps & CLCD_CAP_5551)
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caps &= CLCD_CAP_5551;
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else if (var->green.length == 6 && caps & CLCD_CAP_565)
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caps &= CLCD_CAP_565;
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else {
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/*
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* PL110 officially only supports RGB555,
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* but may be wired up to allow RGB565.
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*/
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if (caps & CLCD_CAP_565) {
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var->green.length = 6;
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caps &= CLCD_CAP_565;
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} else if (caps & CLCD_CAP_5551) {
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var->green.length = 5;
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caps &= CLCD_CAP_5551;
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} else {
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var->green.length = 4;
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caps &= CLCD_CAP_444;
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}
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}
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if (var->green.length >= 5) {
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var->red.length = 5;
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var->blue.length = 5;
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} else {
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var->red.length = 4;
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var->blue.length = 4;
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}
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break;
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case 32:
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/* If we can't do 888, reject */
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caps &= CLCD_CAP_888;
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if (!caps) {
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ret = -EINVAL;
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break;
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}
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var->red.length = 8;
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var->green.length = 8;
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var->blue.length = 8;
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break;
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default:
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ret = -EINVAL;
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break;
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@ -168,7 +228,20 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
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* the bitfield length defined above.
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*/
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if (ret == 0 && var->bits_per_pixel >= 16) {
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if (fb->panel->cntl & CNTL_BGR) {
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bool bgr, rgb;
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bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
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rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
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if (!bgr && !rgb)
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/*
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* The requested format was not possible, try just
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* our capabilities. One of BGR or RGB must be
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* supported.
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*/
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bgr = caps & CLCD_CAP_BGR;
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if (bgr) {
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var->blue.offset = 0;
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var->green.offset = var->blue.offset + var->blue.length;
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var->red.offset = var->green.offset + var->green.length;
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@ -53,6 +53,7 @@
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#define CNTL_LCDBPP8 (3 << 1)
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#define CNTL_LCDBPP16 (4 << 1)
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#define CNTL_LCDBPP16_565 (6 << 1)
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#define CNTL_LCDBPP16_444 (7 << 1)
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#define CNTL_LCDBPP24 (5 << 1)
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#define CNTL_LCDBW (1 << 4)
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#define CNTL_LCDTFT (1 << 5)
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@ -66,6 +67,32 @@
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#define CNTL_LDMAFIFOTIME (1 << 15)
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#define CNTL_WATERMARK (1 << 16)
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enum {
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/* individual formats */
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CLCD_CAP_RGB444 = (1 << 0),
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CLCD_CAP_RGB5551 = (1 << 1),
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CLCD_CAP_RGB565 = (1 << 2),
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CLCD_CAP_RGB888 = (1 << 3),
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CLCD_CAP_BGR444 = (1 << 4),
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CLCD_CAP_BGR5551 = (1 << 5),
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CLCD_CAP_BGR565 = (1 << 6),
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CLCD_CAP_BGR888 = (1 << 7),
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/* connection layouts */
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CLCD_CAP_444 = CLCD_CAP_RGB444 | CLCD_CAP_BGR444,
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CLCD_CAP_5551 = CLCD_CAP_RGB5551 | CLCD_CAP_BGR5551,
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CLCD_CAP_565 = CLCD_CAP_RGB565 | CLCD_CAP_BGR565,
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CLCD_CAP_888 = CLCD_CAP_RGB888 | CLCD_CAP_BGR888,
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/* red/blue ordering */
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CLCD_CAP_RGB = CLCD_CAP_RGB444 | CLCD_CAP_RGB5551 |
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CLCD_CAP_RGB565 | CLCD_CAP_RGB888,
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CLCD_CAP_BGR = CLCD_CAP_BGR444 | CLCD_CAP_BGR5551 |
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CLCD_CAP_BGR565 | CLCD_CAP_BGR888,
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CLCD_CAP_ALL = CLCD_CAP_BGR | CLCD_CAP_RGB,
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};
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struct clcd_panel {
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struct fb_videomode mode;
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signed short width; /* width in mm */
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@ -73,6 +100,7 @@ struct clcd_panel {
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u32 tim2;
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u32 tim3;
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u32 cntl;
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u32 caps;
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unsigned int bpp:8,
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fixedtimings:1,
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grayscale:1;
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@ -96,6 +124,11 @@ struct clcd_fb;
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struct clcd_board {
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const char *name;
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/*
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* Optional. Hardware capability flags.
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*/
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u32 caps;
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/*
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* Optional. Check whether the var structure is acceptable
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* for this display.
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@ -155,34 +188,35 @@ struct clcd_fb {
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static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
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{
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struct fb_var_screeninfo *var = &fb->fb.var;
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u32 val, cpl;
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/*
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* Program the CLCD controller registers and start the CLCD
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*/
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val = ((fb->fb.var.xres / 16) - 1) << 2;
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val |= (fb->fb.var.hsync_len - 1) << 8;
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val |= (fb->fb.var.right_margin - 1) << 16;
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val |= (fb->fb.var.left_margin - 1) << 24;
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val = ((var->xres / 16) - 1) << 2;
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val |= (var->hsync_len - 1) << 8;
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val |= (var->right_margin - 1) << 16;
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val |= (var->left_margin - 1) << 24;
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regs->tim0 = val;
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val = fb->fb.var.yres;
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val = var->yres;
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if (fb->panel->cntl & CNTL_LCDDUAL)
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val /= 2;
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val -= 1;
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val |= (fb->fb.var.vsync_len - 1) << 10;
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val |= fb->fb.var.lower_margin << 16;
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val |= fb->fb.var.upper_margin << 24;
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val |= (var->vsync_len - 1) << 10;
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val |= var->lower_margin << 16;
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val |= var->upper_margin << 24;
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regs->tim1 = val;
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val = fb->panel->tim2;
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val |= fb->fb.var.sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS;
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val |= fb->fb.var.sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS;
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val |= var->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS;
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val |= var->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS;
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cpl = fb->fb.var.xres_virtual;
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cpl = var->xres_virtual;
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if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */
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/* / 1 */;
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else if (!fb->fb.var.grayscale) /* STN color */
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else if (!var->grayscale) /* STN color */
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cpl = cpl * 8 / 3;
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else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */
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cpl /= 8;
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@ -194,10 +228,22 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
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regs->tim3 = fb->panel->tim3;
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val = fb->panel->cntl;
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if (fb->fb.var.grayscale)
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if (var->grayscale)
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val |= CNTL_LCDBW;
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switch (fb->fb.var.bits_per_pixel) {
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if (fb->panel->caps && fb->board->caps &&
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var->bits_per_pixel >= 16) {
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/*
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* if board and panel supply capabilities, we can support
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* changing BGR/RGB depending on supplied parameters
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*/
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if (var->red.offset == 0)
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val &= ~CNTL_BGR;
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else
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val |= CNTL_BGR;
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}
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switch (var->bits_per_pixel) {
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case 1:
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val |= CNTL_LCDBPP1;
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break;
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@ -217,10 +263,12 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
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* custom external wiring.
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*/
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if (amba_part(fb->dev) == 0x110 ||
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fb->fb.var.green.length == 5)
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var->green.length == 5)
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val |= CNTL_LCDBPP16;
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else
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else if (var->green.length == 6)
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val |= CNTL_LCDBPP16_565;
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else
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val |= CNTL_LCDBPP16_444;
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break;
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case 32:
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val |= CNTL_LCDBPP24;
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@ -228,7 +276,7 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
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}
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regs->cntl = val;
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regs->pixclock = fb->fb.var.pixclock;
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regs->pixclock = var->pixclock;
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}
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static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
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