[ARM] Add ARM irqtrace support
This adds support for irqtrace for lockdep on ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
d84b47115a
commit
7ad1bcb25c
4 changed files with 150 additions and 124 deletions
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@ -51,6 +51,10 @@ config GENERIC_HARDIRQS
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bool
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default y
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config TRACE_IRQFLAGS_SUPPORT
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bool
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default y
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config HARDIRQS_SW_RESEND
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bool
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default y
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@ -191,6 +191,9 @@ __dabt_svc:
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__irq_svc:
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svc_entry
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_off
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#endif
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#ifdef CONFIG_PREEMPT
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get_thread_info tsk
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ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
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@ -211,6 +214,10 @@ preempt_return:
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#endif
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ldr r0, [sp, #S_PSR] @ irqs are already disabled
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msr spsr_cxsf, r0
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#ifdef CONFIG_TRACE_IRQFLAGS
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tst r0, #PSR_I_BIT
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bleq trace_hardirqs_on
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#endif
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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.ltorg
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@ -398,6 +405,9 @@ __dabt_usr:
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__irq_usr:
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usr_entry
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_off
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#endif
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get_thread_info tsk
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#ifdef CONFIG_PREEMPT
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ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
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@ -412,6 +422,9 @@ __irq_usr:
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teq r0, r7
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strne r0, [r0, -r0]
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#endif
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_on
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#endif
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mov why, #0
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b ret_to_user
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132
include/asm-arm/irqflags.h
Normal file
132
include/asm-arm/irqflags.h
Normal file
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@ -0,0 +1,132 @@
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#ifndef __ASM_ARM_IRQFLAGS_H
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#define __ASM_ARM_IRQFLAGS_H
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#ifdef __KERNEL__
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#include <asm/ptrace.h>
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/*
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* CPU interrupt mask handling.
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*/
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#if __LINUX_ARM_ARCH__ >= 6
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#define raw_local_irq_save(x) \
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({ \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_save\n" \
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"cpsid i" \
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: "=r" (x) : : "memory", "cc"); \
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})
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#define raw_local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc")
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#define raw_local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc")
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#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
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#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
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#else
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/*
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* Save the current interrupt enable state & disable IRQs
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*/
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#define raw_local_irq_save(x) \
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({ \
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unsigned long temp; \
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(void) (&temp == &x); \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_save\n" \
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" orr %1, %0, #128\n" \
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" msr cpsr_c, %1" \
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: "=r" (x), "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Enable IRQs
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*/
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#define raw_local_irq_enable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_enable\n" \
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" bic %0, %0, #128\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Disable IRQs
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*/
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#define raw_local_irq_disable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_disable\n" \
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" orr %0, %0, #128\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Enable FIQs
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*/
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#define local_fiq_enable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ stf\n" \
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" bic %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Disable FIQs
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*/
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#define local_fiq_disable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ clf\n" \
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" orr %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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#endif
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/*
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* Save the current interrupt enable state.
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*/
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#define raw_local_save_flags(x) \
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({ \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_save_flags" \
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: "=r" (x) : : "memory", "cc"); \
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})
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/*
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* restore saved IRQ & FIQ state
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*/
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#define raw_local_irq_restore(x) \
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__asm__ __volatile__( \
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"msr cpsr_c, %0 @ local_irq_restore\n" \
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: \
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: "r" (x) \
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: "memory", "cc")
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#define raw_irqs_disabled_flags(flags) \
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({ \
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(int)((flags) & PSR_I_BIT); \
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})
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#endif
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#endif
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@ -207,130 +207,7 @@ static inline void sched_cacheflush(void)
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{
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}
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/*
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* CPU interrupt mask handling.
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*/
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#if __LINUX_ARM_ARCH__ >= 6
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#define local_irq_save(x) \
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({ \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_save\n" \
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"cpsid i" \
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: "=r" (x) : : "memory", "cc"); \
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})
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#define local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc")
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#define local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc")
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#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
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#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
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#else
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/*
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* Save the current interrupt enable state & disable IRQs
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*/
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#define local_irq_save(x) \
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({ \
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unsigned long temp; \
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(void) (&temp == &x); \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_save\n" \
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" orr %1, %0, #128\n" \
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" msr cpsr_c, %1" \
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: "=r" (x), "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Enable IRQs
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*/
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#define local_irq_enable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_enable\n" \
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" bic %0, %0, #128\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Disable IRQs
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*/
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#define local_irq_disable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_irq_disable\n" \
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" orr %0, %0, #128\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Enable FIQs
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*/
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#define local_fiq_enable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ stf\n" \
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" bic %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Disable FIQs
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*/
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#define local_fiq_disable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ clf\n" \
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" orr %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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#endif
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/*
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* Save the current interrupt enable state.
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*/
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#define local_save_flags(x) \
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({ \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ local_save_flags" \
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: "=r" (x) : : "memory", "cc"); \
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})
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/*
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* restore saved IRQ & FIQ state
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*/
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#define local_irq_restore(x) \
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__asm__ __volatile__( \
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"msr cpsr_c, %0 @ local_irq_restore\n" \
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: \
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: "r" (x) \
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: "memory", "cc")
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#define irqs_disabled() \
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({ \
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unsigned long flags; \
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local_save_flags(flags); \
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(int)(flags & PSR_I_BIT); \
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})
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#include <linux/irqflags.h>
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#ifdef CONFIG_SMP
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