clk: make ICST driver handle the VCO registers
It turns out that all platforms using the ICST VCO are really just touching two registers, and in the same way as well: one register with the VCO configuration as such, and one lock register that makes it possible to write to the VCO. Factor this register read/write into the ICST driver so we can reuse it in the IM-PD1 driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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401301ccdf
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4 changed files with 81 additions and 95 deletions
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@ -17,33 +17,74 @@
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include "clk-icst.h"
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/**
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* struct clk_icst - ICST VCO clock wrapper
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* @hw: corresponding clock hardware entry
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* @vcoreg: VCO register address
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* @lockreg: VCO lock register address
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* @params: parameters for this ICST instance
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* @rate: current rate
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* @setvco: function to commit ICST settings to hardware
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*/
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struct clk_icst {
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struct clk_hw hw;
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void __iomem *vcoreg;
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void __iomem *lockreg;
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const struct icst_params *params;
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unsigned long rate;
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struct icst_vco (*getvco)(void);
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void (*setvco)(struct icst_vco);
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};
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#define to_icst(_hw) container_of(_hw, struct clk_icst, hw)
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/**
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* vco_get() - get ICST VCO settings from a certain register
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* @vcoreg: register containing the VCO settings
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*/
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static struct icst_vco vco_get(void __iomem *vcoreg)
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{
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u32 val;
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struct icst_vco vco;
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val = readl(vcoreg);
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vco.v = val & 0x1ff;
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vco.r = (val >> 9) & 0x7f;
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vco.s = (val >> 16) & 03;
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return vco;
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}
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/**
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* vco_set() - commit changes to an ICST VCO
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* @locreg: register to poke to unlock the VCO for writing
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* @vcoreg: register containing the VCO settings
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* @vco: ICST VCO parameters to commit
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*/
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static void vco_set(void __iomem *lockreg,
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void __iomem *vcoreg,
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struct icst_vco vco)
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{
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u32 val;
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val = readl(vcoreg) & ~0x7ffff;
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val |= vco.v | (vco.r << 9) | (vco.s << 16);
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/* This magic unlocks the VCO so it can be controlled */
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writel(0xa05f, lockreg);
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writel(val, vcoreg);
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/* This locks the VCO again */
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writel(0, lockreg);
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}
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static unsigned long icst_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_icst *icst = to_icst(hw);
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struct icst_vco vco;
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vco = icst->getvco();
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vco = vco_get(icst->vcoreg);
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icst->rate = icst_hz(icst->params, vco);
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return icst->rate;
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}
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@ -66,7 +107,7 @@ static int icst_set_rate(struct clk_hw *hw, unsigned long rate,
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vco = icst_hz_to_vco(icst->params, rate);
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icst->rate = icst_hz(icst->params, vco);
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icst->setvco(vco);
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vco_set(icst->vcoreg, icst->lockreg, vco);
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return 0;
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}
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@ -76,8 +117,9 @@ static const struct clk_ops icst_ops = {
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.set_rate = icst_set_rate,
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};
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struct clk * __init icst_clk_register(struct device *dev,
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const struct clk_icst_desc *desc)
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struct clk *icst_clk_register(struct device *dev,
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const struct clk_icst_desc *desc,
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void __iomem *base)
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{
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struct clk *clk;
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struct clk_icst *icst;
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@ -95,8 +137,8 @@ struct clk * __init icst_clk_register(struct device *dev,
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init.num_parents = 0;
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icst->hw.init = &init;
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icst->params = desc->params;
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icst->getvco = desc->getvco;
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icst->setvco = desc->setvco;
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icst->vcoreg = base + desc->vco_offset;
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icst->lockreg = base + desc->lock_offset;
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clk = clk_register(dev, &icst->hw);
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if (IS_ERR(clk))
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@ -1,10 +1,18 @@
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#include <asm/hardware/icst.h>
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/**
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* struct clk_icst_desc - descriptor for the ICST VCO
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* @params: ICST parameters
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* @vco_offset: offset to the ICST VCO from the provided memory base
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* @lock_offset: offset to the ICST VCO locking register from the provided
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* memory base
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*/
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struct clk_icst_desc {
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const struct icst_params *params;
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struct icst_vco (*getvco)(void);
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void (*setvco)(struct icst_vco);
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u32 vco_offset;
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u32 lock_offset;
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};
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struct clk *icst_clk_register(struct device *dev,
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const struct clk_icst_desc *desc);
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const struct clk_icst_desc *desc,
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void __iomem *base);
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@ -10,7 +10,7 @@
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_data/clk-integrator.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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@ -22,42 +22,6 @@
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* Inspired by portions of:
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* plat-versatile/clock.c and plat-versatile/include/plat/clock.h
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*/
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#define CM_LOCK (__io_address(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET)
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#define CM_AUXOSC (__io_address(INTEGRATOR_HDR_BASE)+0x1c)
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/**
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* cp_auxvco_get() - get ICST VCO settings for the Integrator/CP
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* @vco: ICST VCO parameters to update with hardware status
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*/
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static struct icst_vco cp_auxvco_get(void)
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{
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u32 val;
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struct icst_vco vco;
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val = readl(CM_AUXOSC);
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vco.v = val & 0x1ff;
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vco.r = (val >> 9) & 0x7f;
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vco.s = (val >> 16) & 03;
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return vco;
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}
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/**
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* cp_auxvco_set() - commit changes to Integrator/CP ICST VCO
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* @vco: ICST VCO parameters to commit
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*/
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static void cp_auxvco_set(struct icst_vco vco)
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{
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u32 val;
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val = readl(CM_AUXOSC) & ~0x7ffff;
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val |= vco.v | (vco.r << 9) | (vco.s << 16);
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/* This magic unlocks the CM VCO so it can be controlled */
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writel(0xa05f, CM_LOCK);
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writel(val, CM_AUXOSC);
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/* This locks the CM again */
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writel(0, CM_LOCK);
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}
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static const struct icst_params cp_auxvco_params = {
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.ref = 24000000,
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static const struct clk_icst_desc __initdata cp_icst_desc = {
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.params = &cp_auxvco_params,
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.getvco = cp_auxvco_get,
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.setvco = cp_auxvco_set,
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.vco_offset = 0x1c,
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.lock_offset = INTEGRATOR_HDR_LOCK_OFFSET,
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};
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/*
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@ -114,6 +78,7 @@ void __init integrator_clk_init(bool is_cp)
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clk_register_clkdev(clk, NULL, "sp804");
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/* ICST VCO clock used on the Integrator/CP CLCD */
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clk = icst_clk_register(NULL, &cp_icst_desc);
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clk = icst_clk_register(NULL, &cp_icst_desc,
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__io_address(INTEGRATOR_HDR_BASE));
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clk_register_clkdev(clk, NULL, "clcd");
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}
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@ -21,38 +21,6 @@
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* Implementation of the ARM RealView clock trees.
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*/
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static void __iomem *sys_lock;
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static void __iomem *sys_vcoreg;
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/**
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* realview_oscvco_get() - get ICST OSC settings for the RealView
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*/
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static struct icst_vco realview_oscvco_get(void)
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{
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u32 val;
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struct icst_vco vco;
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val = readl(sys_vcoreg);
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vco.v = val & 0x1ff;
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vco.r = (val >> 9) & 0x7f;
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vco.s = (val >> 16) & 03;
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return vco;
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}
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static void realview_oscvco_set(struct icst_vco vco)
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{
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u32 val;
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val = readl(sys_vcoreg) & ~0x7ffff;
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val |= vco.v | (vco.r << 9) | (vco.s << 16);
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/* This magic unlocks the CM VCO so it can be controlled */
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writel(0xa05f, sys_lock);
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writel(val, sys_vcoreg);
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/* This locks the CM again */
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writel(0, sys_lock);
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}
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static const struct icst_params realview_oscvco_params = {
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.ref = 24000000,
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.vco_max = ICST307_VCO_MAX,
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.idx2s = icst307_idx2s,
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};
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static const struct clk_icst_desc __initdata realview_icst_desc = {
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static const struct clk_icst_desc __initdata realview_osc0_desc = {
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.params = &realview_oscvco_params,
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.getvco = realview_oscvco_get,
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.setvco = realview_oscvco_set,
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.vco_offset = REALVIEW_SYS_OSC0_OFFSET,
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.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
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};
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static const struct clk_icst_desc __initdata realview_osc4_desc = {
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.params = &realview_oscvco_params,
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.vco_offset = REALVIEW_SYS_OSC4_OFFSET,
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.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
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};
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/*
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{
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struct clk *clk;
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sys_lock = sysbase + REALVIEW_SYS_LOCK_OFFSET;
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if (is_pb1176)
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sys_vcoreg = sysbase + REALVIEW_SYS_OSC0_OFFSET;
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else
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sys_vcoreg = sysbase + REALVIEW_SYS_OSC4_OFFSET;
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/* APB clock dummy */
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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clk_register_clkdev(clk, NULL, "sp804");
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/* ICST VCO clock */
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clk = icst_clk_register(NULL, &realview_icst_desc);
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if (is_pb1176)
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clk = icst_clk_register(NULL, &realview_osc0_desc, sysbase);
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else
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clk = icst_clk_register(NULL, &realview_osc4_desc, sysbase);
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clk_register_clkdev(clk, NULL, "dev:clcd");
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clk_register_clkdev(clk, NULL, "issp:clcd");
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}
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