ixgbe: fix compilation with gcc-3.4
CC [M] drivers/net/ixgbe/ixgbe_main.o drivers/net/ixgbe/ixgbe_main.c: In function `ixgbe_intr': drivers/net/ixgbe/ixgbe_main.c:1290: sorry, unimplemented: inlining failed in call to 'ixgbe_irq_enable': function body not available drivers/net/ixgbe/ixgbe_main.c:1312: sorry, unimplemented: called from here make[4]: *** [drivers/net/ixgbe/ixgbe_main.o] Error 1 Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Acked-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 28 additions and 30 deletions
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@ -1287,7 +1287,34 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
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return;
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return;
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}
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}
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static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
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/**
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* ixgbe_irq_disable - Mask off interrupt generation on the NIC
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* @adapter: board private structure
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**/
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static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
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{
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
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IXGBE_WRITE_FLUSH(&adapter->hw);
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if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
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int i;
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for (i = 0; i < adapter->num_msix_vectors; i++)
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synchronize_irq(adapter->msix_entries[i].vector);
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} else {
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synchronize_irq(adapter->pdev->irq);
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}
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}
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/**
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* ixgbe_irq_enable - Enable default interrupt generation settings
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* @adapter: board private structure
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**/
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static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
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{
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u32 mask;
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mask = IXGBE_EIMS_ENABLE_MASK;
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
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IXGBE_WRITE_FLUSH(&adapter->hw);
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}
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/**
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/**
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* ixgbe_intr - legacy mode Interrupt Handler
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* ixgbe_intr - legacy mode Interrupt Handler
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@ -1393,35 +1420,6 @@ static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
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}
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}
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}
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}
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/**
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* ixgbe_irq_disable - Mask off interrupt generation on the NIC
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* @adapter: board private structure
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**/
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static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
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{
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
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IXGBE_WRITE_FLUSH(&adapter->hw);
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if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
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int i;
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for (i = 0; i < adapter->num_msix_vectors; i++)
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synchronize_irq(adapter->msix_entries[i].vector);
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} else {
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synchronize_irq(adapter->pdev->irq);
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}
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}
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/**
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* ixgbe_irq_enable - Enable default interrupt generation settings
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* @adapter: board private structure
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**/
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static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
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{
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u32 mask;
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mask = IXGBE_EIMS_ENABLE_MASK;
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
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IXGBE_WRITE_FLUSH(&adapter->hw);
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}
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/**
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/**
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* ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
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* ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
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*
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*
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