ARCv2: SLC: Allow boot time disable
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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parent
f2b0b25a37
commit
79335a2ca0
1 changed files with 19 additions and 2 deletions
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@ -23,6 +23,7 @@
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static int l2_line_sz;
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int ioc_exists;
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volatile int slc_enable = 1;
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void (*_cache_line_loop_ic_fn)(unsigned long paddr, unsigned long vaddr,
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unsigned long sz, const int cacheop);
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@ -36,6 +37,7 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
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int n = 0;
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struct cpuinfo_arc_cache *p;
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#define IS_USED_RUN(v) ((v) ? "" : "(disabled) ")
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#define PR_CACHE(p, cfg, str) \
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if (!(p)->ver) \
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n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \
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@ -53,7 +55,8 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
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p = &cpuinfo_arc700[c].slc;
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if (p->ver)
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n += scnprintf(buf + n, len - n,
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"SLC\t\t: %uK, %uB Line\n", p->sz_k, p->line_len);
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"SLC\t\t: %uK, %uB Line%s\n",
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p->sz_k, p->line_len, IS_USED_RUN(slc_enable));
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if (ioc_exists)
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n += scnprintf(buf + n, len - n, "IOC\t\t: exists\n");
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@ -908,6 +911,20 @@ void arc_cache_init(void)
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}
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}
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if (is_isa_arcv2() && l2_line_sz && !slc_enable) {
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/* IM set : flush before invalidate */
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write_aux_reg(ARC_REG_SLC_CTRL,
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read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_IM);
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write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
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/* Important to wait for flush to complete */
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while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
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write_aux_reg(ARC_REG_SLC_CTRL,
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read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_DISABLE);
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}
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if (is_isa_arcv2() && ioc_exists) {
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/* IO coherency base - 0x8z */
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write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
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@ -921,7 +938,7 @@ void arc_cache_init(void)
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__dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
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__dma_cache_inv = __dma_cache_inv_ioc;
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__dma_cache_wback = __dma_cache_wback_ioc;
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} else if (is_isa_arcv2() && l2_line_sz) {
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} else if (is_isa_arcv2() && l2_line_sz && slc_enable) {
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__dma_cache_wback_inv = __dma_cache_wback_inv_slc;
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__dma_cache_inv = __dma_cache_inv_slc;
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__dma_cache_wback = __dma_cache_wback_slc;
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