Merge branches 'pci/host-generic', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-tegra', 'pci/msi', 'pci/misc', 'pci/resource' and 'pci/virtualization' into next
* pci/host-generic: PCI: generic: Fix GPL v2 license string typo * pci/host-mvebu: PCI: mvebu: Fix GPL v2 license string typo * pci/host-rcar: PCI: rcar: Fix GPL v2 license string typo * pci/host-tegra: PCI: tegra: Fix GPL v2 license string typo * pci/msi: PCI/MSI: Use irq_get_msi_desc() to simplify code PCI/MSI: Remove unused list access in __pci_restore_msix_state() PCI/MSI: Retrieve first MSI IRQ from msi_desc rather than pci_dev PCI/MSI: Remove unused function msi_remove_pci_irq_vectors() PCI/MSI: Add msi_setup_entry() to clean up MSI initialization * pci/misc: PCI: Configure ASPM when enabling device x86: don't exclude low BIOS area when allocating address space for non-PCI cards PCI: Add include guard to include/linux/pci_ids.h x86, ia64: Move EFI_FB vga_default_device() initialization to pci_vga_fixup() * pci/resource: PCI: Tidy resource assignment messages PCI: Return conventional error values from pci_revert_fw_address() PCI: Cleanup control flow PCI: Support BAR sizes up to 128GB PCI: Keep original resource if we fail to expand it * pci/virtualization: powerpc/pci: Remove duplicate logic PCI: Make resetting secondary bus logic common
This commit is contained in:
parent
1d0df48692
eed6542dd5
505d8655f7
68947eb175
d975cb5703
e11ece5a5e
1f6ae47ecf
64da465e98
21dd5a43d0
commit
792688fde4
17 changed files with 152 additions and 157 deletions
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@ -6,6 +6,7 @@
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/vgaarb.h>
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#include <linux/screen_info.h>
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#include <asm/machvec.h>
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@ -37,6 +38,27 @@ static void pci_fixup_video(struct pci_dev *pdev)
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return;
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/* Maybe, this machine supports legacy memory map. */
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if (!vga_default_device()) {
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resource_size_t start, end;
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int i;
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/* Does firmware framebuffer belong to us? */
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
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continue;
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start = pci_resource_start(pdev, i);
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end = pci_resource_end(pdev, i);
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if (!start || !end)
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continue;
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if (screen_info.lfb_base >= start &&
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(screen_info.lfb_base + screen_info.lfb_size) < end)
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vga_set_default_device(pdev);
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}
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}
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/* Is VGA routed to us? */
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bus = pdev->bus;
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while (bus) {
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@ -123,21 +123,12 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus,
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void pcibios_reset_secondary_bus(struct pci_dev *dev)
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{
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u16 ctrl;
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if (ppc_md.pcibios_reset_secondary_bus) {
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ppc_md.pcibios_reset_secondary_bus(dev);
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return;
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}
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pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &ctrl);
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ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
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pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
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msleep(2);
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ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
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pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
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ssleep(1);
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pci_reset_secondary_bus(dev);
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}
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static resource_size_t pcibios_io_size(const struct pci_controller *hose)
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@ -17,10 +17,4 @@
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#define vga_readb(x) (*(x))
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#define vga_writeb(x, y) (*(y) = (x))
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#ifdef CONFIG_FB_EFI
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#define __ARCH_HAS_VGA_DEFAULT_DEVICE
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extern struct pci_dev *vga_default_device(void);
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extern void vga_set_default_device(struct pci_dev *pdev);
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#endif
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#endif /* _ASM_X86_VGA_H */
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@ -37,10 +37,12 @@ static void remove_e820_regions(struct resource *avail)
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void arch_remove_reservations(struct resource *avail)
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{
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/* Trim out BIOS areas (low 1MB and high 2MB) and E820 regions */
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/*
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* Trim out BIOS area (high 2MB) and E820 regions. We do not remove
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* the low 1MB unconditionally, as this area is needed for some ISA
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* cards requiring a memory range, e.g. the i82365 PCMCIA controller.
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*/
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if (avail->flags & IORESOURCE_MEM) {
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if (avail->start < BIOS_END)
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avail->start = BIOS_END;
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resource_clip(avail, BIOS_ROM_BASE, BIOS_ROM_END);
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remove_e820_regions(avail);
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@ -326,6 +326,27 @@ static void pci_fixup_video(struct pci_dev *pdev)
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struct pci_bus *bus;
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u16 config;
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if (!vga_default_device()) {
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resource_size_t start, end;
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int i;
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/* Does firmware framebuffer belong to us? */
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
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continue;
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start = pci_resource_start(pdev, i);
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end = pci_resource_end(pdev, i);
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if (!start || !end)
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continue;
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if (screen_info.lfb_base >= start &&
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(screen_info.lfb_base + screen_info.lfb_size) < end)
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vga_set_default_device(pdev);
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}
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}
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/* Is VGA routed to us? */
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bus = pdev->bus;
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while (bus) {
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@ -162,6 +162,10 @@ pcibios_align_resource(void *data, const struct resource *res,
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return start;
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if (start & 0x300)
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start = (start + 0x3ff) & ~0x3ff;
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} else if (res->flags & IORESOURCE_MEM) {
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/* The low 1MB range is reserved for ISA cards */
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if (start < BIOS_END)
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start = BIOS_END;
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}
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return start;
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}
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@ -385,4 +385,4 @@ module_platform_driver(gen_pci_driver);
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MODULE_DESCRIPTION("Generic PCI host driver");
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MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
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MODULE_LICENSE("GPLv2");
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MODULE_LICENSE("GPL v2");
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@ -1094,4 +1094,4 @@ module_platform_driver(mvebu_pcie_driver);
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MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
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MODULE_DESCRIPTION("Marvell EBU PCIe driver");
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MODULE_LICENSE("GPLv2");
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MODULE_LICENSE("GPL v2");
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@ -1716,4 +1716,4 @@ module_platform_driver(tegra_pcie_driver);
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MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
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MODULE_DESCRIPTION("NVIDIA Tegra PCIe driver");
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MODULE_LICENSE("GPLv2");
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MODULE_LICENSE("GPL v2");
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@ -989,4 +989,4 @@ module_platform_driver(rcar_pcie_driver);
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MODULE_AUTHOR("Phil Edworthy <phil.edworthy@renesas.com>");
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MODULE_DESCRIPTION("Renesas R-Car PCIe driver");
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MODULE_LICENSE("GPLv2");
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MODULE_LICENSE("GPL v2");
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@ -235,7 +235,7 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag)
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msix_mask_irq(desc, flag);
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readl(desc->mask_base); /* Flush write to device */
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} else {
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unsigned offset = data->irq - desc->dev->irq;
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unsigned offset = data->irq - desc->irq;
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msi_mask_irq(desc, 1 << offset, flag << offset);
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}
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}
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@ -463,7 +463,6 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
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if (!dev->msix_enabled)
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return;
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BUG_ON(list_empty(&dev->msi_list));
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entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
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/* route the table */
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pci_intx_for_msi(dev, 0);
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@ -488,7 +487,6 @@ EXPORT_SYMBOL_GPL(pci_restore_msi_state);
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static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct msi_desc *entry;
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unsigned long irq;
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int retval;
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if (retval)
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return retval;
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list_for_each_entry(entry, &pdev->msi_list, list) {
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if (entry->irq == irq) {
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return sprintf(buf, "%s\n",
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entry->msi_attrib.is_msix ? "msix" : "msi");
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}
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}
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entry = irq_get_msi_desc(irq);
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if (entry)
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return sprintf(buf, "%s\n",
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entry->msi_attrib.is_msix ? "msix" : "msi");
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return -ENODEV;
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}
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@ -581,6 +578,38 @@ static int populate_msi_sysfs(struct pci_dev *pdev)
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return ret;
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}
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static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
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{
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u16 control;
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struct msi_desc *entry;
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/* MSI Entry Initialization */
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entry = alloc_msi_entry(dev);
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if (!entry)
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return NULL;
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pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
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entry->msi_attrib.is_msix = 0;
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entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
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entry->msi_attrib.entry_nr = 0;
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entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
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entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
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entry->msi_attrib.pos = dev->msi_cap;
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entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
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if (control & PCI_MSI_FLAGS_64BIT)
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
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else
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
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/* Save the initial mask status */
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if (entry->msi_attrib.maskbit)
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pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
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return entry;
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}
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/**
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* msi_capability_init - configure device's MSI capability structure
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* @dev: pointer to the pci_dev data structure of MSI device function
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{
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struct msi_desc *entry;
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int ret;
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u16 control;
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unsigned mask;
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msi_set_enable(dev, 0); /* Disable MSI during set up */
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pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
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/* MSI Entry Initialization */
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entry = alloc_msi_entry(dev);
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entry = msi_setup_entry(dev);
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if (!entry)
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return -ENOMEM;
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entry->msi_attrib.is_msix = 0;
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entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
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entry->msi_attrib.entry_nr = 0;
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entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
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entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
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entry->msi_attrib.pos = dev->msi_cap;
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entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
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if (control & PCI_MSI_FLAGS_64BIT)
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
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else
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
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/* All MSIs are unmasked by default, Mask them all */
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if (entry->msi_attrib.maskbit)
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pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
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mask = msi_mask(entry->msi_attrib.multi_cap);
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msi_mask_irq(entry, mask, mask);
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@ -999,24 +1011,6 @@ void pci_disable_msix(struct pci_dev *dev)
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}
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EXPORT_SYMBOL(pci_disable_msix);
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/**
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* msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
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* @dev: pointer to the pci_dev data structure of MSI(X) device function
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*
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* Being called during hotplug remove, from which the device function
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* is hot-removed. All previous assigned MSI/MSI-X irqs, if
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* allocated for this device function, are reclaimed to unused state,
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* which may be used later on.
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**/
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void msi_remove_pci_irq_vectors(struct pci_dev *dev)
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{
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if (!pci_msi_enable || !dev)
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return;
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if (dev->msi_enabled || dev->msix_enabled)
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free_msi_irqs(dev);
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}
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void pci_no_msi(void)
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{
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pci_msi_enable = 0;
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@ -839,12 +839,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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if (!__pci_complete_power_transition(dev, state))
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error = 0;
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/*
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* When aspm_policy is "powersave" this call ensures
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* that ASPM is configured.
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*/
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if (!error && dev->bus->self)
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pcie_aspm_powersave_config_link(dev->bus->self);
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return error;
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}
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@ -1195,12 +1189,18 @@ int __weak pcibios_enable_device(struct pci_dev *dev, int bars)
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static int do_pci_enable_device(struct pci_dev *dev, int bars)
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{
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int err;
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struct pci_dev *bridge;
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u16 cmd;
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u8 pin;
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err = pci_set_power_state(dev, PCI_D0);
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if (err < 0 && err != -EIO)
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return err;
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bridge = pci_upstream_bridge(dev);
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if (bridge)
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pcie_aspm_powersave_config_link(bridge);
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err = pcibios_enable_device(dev, bars);
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if (err < 0)
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return err;
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@ -3193,7 +3193,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
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return 0;
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}
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void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
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void pci_reset_secondary_bus(struct pci_dev *dev)
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{
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u16 ctrl;
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@ -3219,6 +3219,11 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
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ssleep(1);
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}
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void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
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{
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pci_reset_secondary_bus(dev);
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}
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/**
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* pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge.
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* @dev: Bridge device
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@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
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{
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struct pci_dev *dev;
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resource_size_t min_align, align, size, size0, size1;
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resource_size_t aligns[14]; /* Alignments from 1Mb to 8Gb */
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resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
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int order, max_order;
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struct resource *b_res = find_free_bus_resource(bus,
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mask | IORESOURCE_PREFETCH, type);
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@ -166,11 +166,10 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
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{
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struct resource *root, *conflict;
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resource_size_t fw_addr, start, end;
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int ret = 0;
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fw_addr = pcibios_retrieve_fw_addr(dev, resno);
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if (!fw_addr)
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return 1;
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return -ENOMEM;
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start = res->start;
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end = res->end;
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@ -189,14 +188,13 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
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resno, res);
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conflict = request_resource_conflict(root, res);
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if (conflict) {
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dev_info(&dev->dev,
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"BAR %d: %pR conflicts with %s %pR\n", resno,
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res, conflict->name, conflict);
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dev_info(&dev->dev, "BAR %d: %pR conflicts with %s %pR\n",
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resno, res, conflict->name, conflict);
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res->start = start;
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res->end = end;
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ret = 1;
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return -EBUSY;
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}
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return ret;
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return 0;
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}
|
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|
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static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
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|
@ -250,10 +248,8 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
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static int _pci_assign_resource(struct pci_dev *dev, int resno,
|
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resource_size_t size, resource_size_t min_align)
|
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{
|
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struct resource *res = dev->resource + resno;
|
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struct pci_bus *bus;
|
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int ret;
|
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char *type;
|
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|
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bus = dev->bus;
|
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while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
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|
@ -262,21 +258,6 @@ static int _pci_assign_resource(struct pci_dev *dev, int resno,
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bus = bus->parent;
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}
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if (ret) {
|
||||
if (res->flags & IORESOURCE_MEM)
|
||||
if (res->flags & IORESOURCE_PREFETCH)
|
||||
type = "mem pref";
|
||||
else
|
||||
type = "mem";
|
||||
else if (res->flags & IORESOURCE_IO)
|
||||
type = "io";
|
||||
else
|
||||
type = "unknown";
|
||||
dev_info(&dev->dev,
|
||||
"BAR %d: can't assign %s (size %#llx)\n",
|
||||
resno, type, (unsigned long long) resource_size(res));
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -302,17 +283,24 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
|
|||
* where firmware left it. That at least has a chance of
|
||||
* working, which is better than just leaving it disabled.
|
||||
*/
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
dev_info(&dev->dev, "BAR %d: no space for %pR\n", resno, res);
|
||||
ret = pci_revert_fw_address(res, dev, resno, size);
|
||||
|
||||
if (!ret) {
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
}
|
||||
return ret;
|
||||
|
||||
if (ret < 0) {
|
||||
dev_info(&dev->dev, "BAR %d: failed to assign %pR\n", resno,
|
||||
res);
|
||||
return ret;
|
||||
}
|
||||
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_assign_resource);
|
||||
|
||||
|
@ -320,9 +308,11 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
|
|||
resource_size_t min_align)
|
||||
{
|
||||
struct resource *res = dev->resource + resno;
|
||||
unsigned long flags;
|
||||
resource_size_t new_size;
|
||||
int ret;
|
||||
|
||||
flags = res->flags;
|
||||
res->flags |= IORESOURCE_UNSET;
|
||||
if (!res->parent) {
|
||||
dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n",
|
||||
|
@ -333,14 +323,21 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
|
|||
/* already aligned with min_align */
|
||||
new_size = resource_size(res) + addsize;
|
||||
ret = _pci_assign_resource(dev, resno, new_size, min_align);
|
||||
if (!ret) {
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
if (ret) {
|
||||
res->flags = flags;
|
||||
dev_info(&dev->dev, "BAR %d: %pR (failed to expand by %#llx)\n",
|
||||
resno, res, (unsigned long long) addsize);
|
||||
return ret;
|
||||
}
|
||||
return ret;
|
||||
|
||||
res->flags &= ~IORESOURCE_UNSET;
|
||||
res->flags &= ~IORESOURCE_STARTALIGN;
|
||||
dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n",
|
||||
resno, res, (unsigned long long) addsize);
|
||||
if (resno < PCI_BRIDGE_RESOURCES)
|
||||
pci_update_resource(dev, resno);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pci_enable_resources(struct pci_dev *dev, int mask)
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
|
||||
static bool request_mem_succeeded = false;
|
||||
|
||||
static struct pci_dev *default_vga;
|
||||
|
||||
static struct fb_var_screeninfo efifb_defined = {
|
||||
.activate = FB_ACTIVATE_NOW,
|
||||
.height = -1,
|
||||
|
@ -84,23 +82,10 @@ static struct fb_ops efifb_ops = {
|
|||
.fb_imageblit = cfb_imageblit,
|
||||
};
|
||||
|
||||
struct pci_dev *vga_default_device(void)
|
||||
{
|
||||
return default_vga;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(vga_default_device);
|
||||
|
||||
void vga_set_default_device(struct pci_dev *pdev)
|
||||
{
|
||||
default_vga = pdev;
|
||||
}
|
||||
|
||||
static int efifb_setup(char *options)
|
||||
{
|
||||
char *this_opt;
|
||||
int i;
|
||||
struct pci_dev *dev = NULL;
|
||||
|
||||
if (options && *options) {
|
||||
while ((this_opt = strsep(&options, ",")) != NULL) {
|
||||
|
@ -126,30 +111,6 @@ static int efifb_setup(char *options)
|
|||
}
|
||||
}
|
||||
|
||||
for_each_pci_dev(dev) {
|
||||
int i;
|
||||
|
||||
if ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
|
||||
continue;
|
||||
|
||||
for (i=0; i < DEVICE_COUNT_RESOURCE; i++) {
|
||||
resource_size_t start, end;
|
||||
|
||||
if (!(pci_resource_flags(dev, i) & IORESOURCE_MEM))
|
||||
continue;
|
||||
|
||||
start = pci_resource_start(dev, i);
|
||||
end = pci_resource_end(dev, i);
|
||||
|
||||
if (!start || !end)
|
||||
continue;
|
||||
|
||||
if (screen_info.lfb_base >= start &&
|
||||
(screen_info.lfb_base + screen_info.lfb_size) < end)
|
||||
default_vga = dev;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -978,6 +978,8 @@ int pci_try_reset_slot(struct pci_slot *slot);
|
|||
int pci_probe_reset_bus(struct pci_bus *bus);
|
||||
int pci_reset_bus(struct pci_bus *bus);
|
||||
int pci_try_reset_bus(struct pci_bus *bus);
|
||||
void pci_reset_secondary_bus(struct pci_dev *dev);
|
||||
void pcibios_reset_secondary_bus(struct pci_dev *dev);
|
||||
void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
|
||||
void pci_update_resource(struct pci_dev *dev, int resno);
|
||||
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
|
||||
|
@ -1186,7 +1188,6 @@ int pci_msix_vec_count(struct pci_dev *dev);
|
|||
int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
|
||||
void pci_msix_shutdown(struct pci_dev *dev);
|
||||
void pci_disable_msix(struct pci_dev *dev);
|
||||
void msi_remove_pci_irq_vectors(struct pci_dev *dev);
|
||||
void pci_restore_msi_state(struct pci_dev *dev);
|
||||
int pci_msi_enabled(void);
|
||||
int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec);
|
||||
|
@ -1217,7 +1218,6 @@ static inline int pci_enable_msix(struct pci_dev *dev,
|
|||
{ return -ENOSYS; }
|
||||
static inline void pci_msix_shutdown(struct pci_dev *dev) { }
|
||||
static inline void pci_disable_msix(struct pci_dev *dev) { }
|
||||
static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) { }
|
||||
static inline void pci_restore_msi_state(struct pci_dev *dev) { }
|
||||
static inline int pci_msi_enabled(void) { return 0; }
|
||||
static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec,
|
||||
|
|
|
@ -6,6 +6,8 @@
|
|||
* Do not add new entries to this file unless the definitions
|
||||
* are shared between multiple drivers.
|
||||
*/
|
||||
#ifndef _LINUX_PCI_IDS_H
|
||||
#define _LINUX_PCI_IDS_H
|
||||
|
||||
/* Device classes and subclasses */
|
||||
|
||||
|
@ -2968,3 +2970,5 @@
|
|||
#define PCI_DEVICE_ID_XEN_PLATFORM 0x0001
|
||||
|
||||
#define PCI_VENDOR_ID_OCZ 0x1b85
|
||||
|
||||
#endif /* _LINUX_PCI_IDS_H */
|
||||
|
|
Loading…
Reference in a new issue