PCI/PTM: Inherit Switch Downstream Port PTM settings from Upstream Port
[ Upstream commit 7b38fd9760f51cc83d80eed2cfbde8b5ead9e93a ]
Except for Endpoints, we enable PTM at enumeration-time. Previously we did
not account for the fact that Switch Downstream Ports are not permitted to
have a PTM capability; their PTM behavior is controlled by the Upstream
Port (PCIe r5.0, sec 7.9.16). Since Downstream Ports don't have a PTM
capability, we did not mark them as "ptm_enabled", which meant that
pci_enable_ptm() on an Endpoint failed because there was no PTM path to it.
Mark Downstream Ports as "ptm_enabled" if their Upstream Port has PTM
enabled.
Fixes: eec097d431
("PCI: Add pci_enable_ptm() for drivers to enable PTM on endpoints")
Reported-by: Aditya Paluri <Venkata.AdityaPaluri@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
4ad7add507
commit
78cf33ae0e
1 changed files with 17 additions and 5 deletions
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@ -39,10 +39,6 @@ void pci_ptm_init(struct pci_dev *dev)
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if (!pci_is_pcie(dev))
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return;
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pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
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if (!pos)
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return;
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/*
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* Enable PTM only on interior devices (root ports, switch ports,
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* etc.) on the assumption that it causes no link traffic until an
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@ -52,6 +48,23 @@ void pci_ptm_init(struct pci_dev *dev)
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pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END))
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return;
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/*
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* Switch Downstream Ports are not permitted to have a PTM
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* capability; their PTM behavior is controlled by the Upstream
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* Port (PCIe r5.0, sec 7.9.16).
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*/
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ups = pci_upstream_bridge(dev);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM &&
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ups && ups->ptm_enabled) {
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dev->ptm_granularity = ups->ptm_granularity;
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dev->ptm_enabled = 1;
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return;
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}
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pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
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if (!pos)
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return;
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pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
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local_clock = (cap & PCI_PTM_GRANULARITY_MASK) >> 8;
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@ -61,7 +74,6 @@ void pci_ptm_init(struct pci_dev *dev)
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* the spec recommendation (PCIe r3.1, sec 7.32.3), select the
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* furthest upstream Time Source as the PTM Root.
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*/
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ups = pci_upstream_bridge(dev);
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if (ups && ups->ptm_enabled) {
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ctrl = PCI_PTM_CTRL_ENABLE;
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if (ups->ptm_granularity == 0)
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