mfd: Support multiple active WM831x AUXADC conversions
The WM831x AUXADC hardware can schedule multiple conversions at once, allowing higher performance when more than one source is in use as we can have the hardware start new conversions without having to wait for a register write. Take advantage of this in the interrupt driven case, maintaining a list of callers that are waiting for AUXADC conversions and completing them all simultaneously. The external interface of the AUXADC is not changed so there will be limited use of the feature immediately. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Mark Brown
Samuel Ortiz
parent
a2495bc727
commit
78bb3688ea
2 changed files with 189 additions and 80 deletions
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@ -17,6 +17,7 @@
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#include <linux/delay.h>
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#include <linux/mfd/core.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/mfd/wm831x/core.h>
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#include <linux/mfd/wm831x/pdata.h>
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@ -25,19 +26,139 @@
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#include <linux/mfd/wm831x/otp.h>
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#include <linux/mfd/wm831x/regulator.h>
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/**
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* wm831x_auxadc_read: Read a value from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret, src, irq_masked, timeout;
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struct wm831x_auxadc_req {
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struct list_head list;
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enum wm831x_auxadc input;
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int val;
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struct completion done;
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};
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/* Are we using the interrupt? */
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irq_masked = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_1_MASK);
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irq_masked &= WM831X_AUXADC_DATA_EINT;
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static int wm831x_auxadc_read_irq(struct wm831x *wm831x,
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enum wm831x_auxadc input)
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{
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struct wm831x_auxadc_req *req;
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int ret;
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bool ena = false;
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req = kzalloc(sizeof(*req), GFP_KERNEL);
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if (!req)
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return -ENOMEM;
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init_completion(&req->done);
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req->input = input;
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req->val = -ETIMEDOUT;
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mutex_lock(&wm831x->auxadc_lock);
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/* Enqueue the request */
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list_add(&req->list, &wm831x->auxadc_pending);
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ena = !wm831x->auxadc_active;
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if (ena) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_ENA, WM831X_AUX_ENA);
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if (ret != 0) {
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dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n",
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ret);
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goto out;
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}
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}
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/* Enable the conversion if not already running */
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if (!(wm831x->auxadc_active & (1 << input))) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
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1 << input, 1 << input);
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if (ret != 0) {
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dev_err(wm831x->dev,
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"Failed to set AUXADC source: %d\n", ret);
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goto out;
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}
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wm831x->auxadc_active |= 1 << input;
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}
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/* We convert at the fastest rate possible */
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if (ena) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA |
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WM831X_AUX_RATE_MASK,
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WM831X_AUX_CVT_ENA |
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WM831X_AUX_RATE_MASK);
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if (ret != 0) {
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dev_err(wm831x->dev, "Failed to start AUXADC: %d\n",
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ret);
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goto out;
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}
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}
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mutex_unlock(&wm831x->auxadc_lock);
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/* Wait for an interrupt */
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wait_for_completion_timeout(&req->done, msecs_to_jiffies(500));
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mutex_lock(&wm831x->auxadc_lock);
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list_del(&req->list);
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ret = req->val;
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out:
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mutex_unlock(&wm831x->auxadc_lock);
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kfree(req);
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return ret;
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}
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static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
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{
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struct wm831x *wm831x = irq_data;
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struct wm831x_auxadc_req *req;
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int ret, input, val;
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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return IRQ_NONE;
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}
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input = ((ret & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (input == 14)
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input = WM831X_AUX_CAL;
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val = ret & WM831X_AUX_DATA_MASK;
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mutex_lock(&wm831x->auxadc_lock);
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/* Disable this conversion, we're about to complete all users */
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wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
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1 << input, 0);
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wm831x->auxadc_active &= ~(1 << input);
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/* Turn off the entire convertor if idle */
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if (!wm831x->auxadc_active)
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wm831x_reg_write(wm831x, WM831X_AUXADC_CONTROL, 0);
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/* Wake up any threads waiting for this request */
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list_for_each_entry(req, &wm831x->auxadc_pending, list) {
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if (req->input == input) {
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req->val = val;
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complete(&req->done);
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}
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}
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mutex_unlock(&wm831x->auxadc_lock);
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return IRQ_HANDLED;
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}
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static int wm831x_auxadc_read_polled(struct wm831x *wm831x,
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enum wm831x_auxadc input)
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{
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int ret, src, timeout;
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mutex_lock(&wm831x->auxadc_lock);
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@ -57,9 +178,6 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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goto out;
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}
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/* Clear any notification from a very late arriving interrupt */
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try_wait_for_completion(&wm831x->auxadc_done);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
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if (ret < 0) {
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@ -67,59 +185,42 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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goto disable;
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}
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if (irq_masked) {
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/* If we're not using interrupts then poll the
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* interrupt status register */
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timeout = 5;
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while (timeout) {
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msleep(1);
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/* If we're not using interrupts then poll the
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* interrupt status register */
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timeout = 5;
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while (timeout) {
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msleep(1);
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ret = wm831x_reg_read(wm831x,
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WM831X_INTERRUPT_STATUS_1);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"ISR 1 read failed: %d\n", ret);
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goto disable;
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}
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/* Did it complete? */
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if (ret & WM831X_AUXADC_DATA_EINT) {
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wm831x_reg_write(wm831x,
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WM831X_INTERRUPT_STATUS_1,
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WM831X_AUXADC_DATA_EINT);
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break;
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} else {
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dev_err(wm831x->dev,
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"AUXADC conversion timeout\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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ret = wm831x_reg_read(wm831x,
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WM831X_INTERRUPT_STATUS_1);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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"ISR 1 read failed: %d\n", ret);
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goto disable;
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}
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wm831x->auxadc_data = ret;
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} else {
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/* If we are using interrupts then wait for the
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* interrupt to complete. Use an extremely long
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* timeout to handle situations with heavy load where
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* the notification of the interrupt may be delayed by
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* threaded IRQ handling. */
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if (!wait_for_completion_timeout(&wm831x->auxadc_done,
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msecs_to_jiffies(500))) {
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dev_err(wm831x->dev, "Timed out waiting for AUXADC\n");
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/* Did it complete? */
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if (ret & WM831X_AUXADC_DATA_EINT) {
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wm831x_reg_write(wm831x,
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WM831X_INTERRUPT_STATUS_1,
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WM831X_AUXADC_DATA_EINT);
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break;
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} else {
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dev_err(wm831x->dev,
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"AUXADC conversion timeout\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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src = ((wm831x->auxadc_data & WM831X_AUX_DATA_SRC_MASK)
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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goto disable;
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}
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src = ((ret & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (src == 14)
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@ -130,7 +231,7 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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src, input);
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ret = -EINVAL;
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} else {
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ret = wm831x->auxadc_data & WM831X_AUX_DATA_MASK;
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ret &= WM831X_AUX_DATA_MASK;
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}
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disable:
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@ -139,26 +240,18 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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mutex_unlock(&wm831x->auxadc_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
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static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
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/**
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* wm831x_auxadc_read: Read a value from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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struct wm831x *wm831x = irq_data;
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int ret;
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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wm831x->auxadc_data = 0xffff;
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} else {
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wm831x->auxadc_data = ret;
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}
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complete(&wm831x->auxadc_done);
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return IRQ_HANDLED;
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return wm831x->auxadc_read(wm831x, input);
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
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/**
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* wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
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@ -185,15 +278,22 @@ void wm831x_auxadc_init(struct wm831x *wm831x)
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int ret;
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mutex_init(&wm831x->auxadc_lock);
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init_completion(&wm831x->auxadc_done);
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INIT_LIST_HEAD(&wm831x->auxadc_pending);
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if (wm831x->irq && wm831x->irq_base) {
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wm831x->auxadc_read = wm831x_auxadc_read_irq;
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if (wm831x->irq_base) {
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ret = request_threaded_irq(wm831x->irq_base +
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WM831X_IRQ_AUXADC_DATA,
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NULL, wm831x_auxadc_irq, 0,
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"auxadc", wm831x);
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if (ret < 0)
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if (ret < 0) {
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dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
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ret);
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wm831x->auxadc_read = NULL;
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}
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}
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if (!wm831x->auxadc_read)
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wm831x->auxadc_read = wm831x_auxadc_read_polled;
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}
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@ -17,6 +17,7 @@
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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/*
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* Register values.
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@ -249,6 +250,12 @@ enum wm831x_parent {
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WM8326 = 0x8326,
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};
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struct wm831x;
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enum wm831x_auxadc;
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typedef int (*wm831x_auxadc_read_fn)(struct wm831x *wm831x,
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enum wm831x_auxadc input);
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struct wm831x {
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struct mutex io_lock;
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@ -277,8 +284,9 @@ struct wm831x {
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int gpio_update[WM831X_NUM_GPIO_REGS];
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struct mutex auxadc_lock;
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struct completion auxadc_done;
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u16 auxadc_data;
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struct list_head auxadc_pending;
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u16 auxadc_active;
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wm831x_auxadc_read_fn auxadc_read;
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/* The WM831x has a security key blocking access to certain
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* registers. The mutex is taken by the accessors for locking
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@ -305,5 +313,6 @@ void wm831x_device_exit(struct wm831x *wm831x);
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int wm831x_device_suspend(struct wm831x *wm831x);
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int wm831x_irq_init(struct wm831x *wm831x, int irq);
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void wm831x_irq_exit(struct wm831x *wm831x);
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void wm831x_auxadc_init(struct wm831x *wm831x);
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#endif
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