dmaengine: add possibility for cyclic transfers
Cyclic transfers are useful for audio where a single buffer divided in periods has to be transfered endlessly until stopped. After being prepared the transfer is started using the dma_async_descriptor->tx_submit function. dma_async_descriptor->callback is called after each period. The transfer is stopped using the DMA_TERMINATE_ALL callback. While being used for cyclic transfers the channel cannot be used for other transfer types. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2 changed files with 10 additions and 1 deletions
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@ -692,6 +692,8 @@ int dma_async_device_register(struct dma_device *device)
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!device->device_prep_dma_interrupt);
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BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
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!device->device_prep_slave_sg);
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BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
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!device->device_prep_dma_cyclic);
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BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
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!device->device_control);
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@ -67,10 +67,11 @@ enum dma_transaction_type {
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DMA_PRIVATE,
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DMA_ASYNC_TX,
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DMA_SLAVE,
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DMA_CYCLIC,
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};
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/* last transaction type for creation of the capabilities mask */
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#define DMA_TX_TYPE_END (DMA_SLAVE + 1)
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#define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
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/**
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@ -422,6 +423,9 @@ struct dma_tx_state {
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* @device_prep_dma_memset: prepares a memset operation
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* @device_prep_dma_interrupt: prepares an end of chain interrupt operation
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* @device_prep_slave_sg: prepares a slave dma operation
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* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
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* The function takes a buffer of size buf_len. The callback function will
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* be called after period_len bytes have been transferred.
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* @device_control: manipulate all pending operations on a channel, returns
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* zero or error code
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* @device_tx_status: poll for transaction completion, the optional
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@ -478,6 +482,9 @@ struct dma_device {
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struct dma_chan *chan, struct scatterlist *sgl,
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unsigned int sg_len, enum dma_data_direction direction,
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unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
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struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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size_t period_len, enum dma_data_direction direction);
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int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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unsigned long arg);
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