ARC: clockevent: DT based probe
- timer frequency is derived from DT (no longer rely on top level DT "clock-frequency" probed early and exported by asm/clk.h) - TIMER0_IRQ need not be exported across arch code, confined to intc as it is property of same - Any failures in clockevent setup are considered pedantic and system panic()'s as there is no generic fallback (unlike clocksource where a jiffies based soft clocksource always exists) Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta
parent
7ec9f34a03
commit
77c8d0d6b3
3 changed files with 45 additions and 25 deletions
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@ -12,15 +12,6 @@
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#define NR_CPU_IRQS 32 /* number of interrupt lines of ARC770 CPU */
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#define NR_IRQS 128 /* allow some CPU external IRQ handling */
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/* Platform Independent IRQs */
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#ifdef CONFIG_ISA_ARCOMPACT
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#define TIMER0_IRQ 3
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#define TIMER1_IRQ 4
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#else
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#define TIMER0_IRQ 16
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#define TIMER1_IRQ 17
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#endif
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#include <linux/interrupt.h>
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#include <asm-generic/irq.h>
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@ -14,6 +14,8 @@
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#include <linux/irqchip.h>
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#include <asm/irq.h>
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#define TIMER0_IRQ 3 /* Fixed by ISA */
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/*
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* Early Hardware specific Interrupt setup
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* -Platform independent, needed for each CPU (not foldable into init_IRQ)
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@ -30,19 +30,15 @@
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*/
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/cpu.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <asm/irq.h>
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#include <asm/arcregs.h>
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#include <asm/clk.h>
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#include <asm/mach_desc.h>
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#include <asm/mcip.h>
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@ -59,6 +55,30 @@
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#define ARC_TIMER_MAX 0xFFFFFFFF
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static unsigned long arc_timer_freq;
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static int noinline arc_get_timer_clk(struct device_node *node)
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{
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struct clk *clk;
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int ret;
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk)) {
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pr_err("timer missing clk");
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return PTR_ERR(clk);
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}
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ret = clk_prepare_enable(clk);
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if (ret) {
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pr_err("Couldn't enable parent clk\n");
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return ret;
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}
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arc_timer_freq = clk_get_rate(clk);
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return 0;
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}
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/********** Clock Source Device *********/
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#ifdef CONFIG_ARC_HAS_GFRC
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@ -182,7 +202,7 @@ static struct clocksource arc_counter = {
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/********** Clock Event Device *********/
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static int arc_timer_irq = TIMER0_IRQ;
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static int arc_timer_irq;
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/*
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* Arm the timer to interrupt after @cycles
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@ -210,7 +230,7 @@ static int arc_clkevent_set_periodic(struct clock_event_device *dev)
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* At X Hz, 1 sec = 1000ms -> X cycles;
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* 10ms -> X / 100 cycles
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*/
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arc_timer_event_setup(arc_get_core_freq() / HZ);
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arc_timer_event_setup(arc_timer_freq / HZ);
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return 0;
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}
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@ -253,7 +273,7 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
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switch (action & ~CPU_TASKS_FROZEN) {
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case CPU_STARTING:
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clockevents_config_and_register(evt, arc_get_core_freq(),
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clockevents_config_and_register(evt, arc_timer_freq,
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0, ULONG_MAX);
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enable_percpu_irq(arc_timer_irq, 0);
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break;
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@ -272,25 +292,35 @@ static struct notifier_block arc_timer_cpu_nb = {
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/*
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* clockevent setup for boot CPU
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*/
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static void __init arc_clockevent_setup(void)
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static void __init arc_clockevent_setup(struct device_node *node)
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{
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struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
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int ret;
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register_cpu_notifier(&arc_timer_cpu_nb);
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arc_timer_irq = irq_of_parse_and_map(node, 0);
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if (arc_timer_irq <= 0)
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panic("clockevent: missing irq");
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ret = arc_get_timer_clk(node);
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if (ret)
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panic("clockevent: missing clk");
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evt->irq = arc_timer_irq;
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evt->cpumask = cpumask_of(smp_processor_id());
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clockevents_config_and_register(evt, arc_get_core_freq(),
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clockevents_config_and_register(evt, arc_timer_freq,
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0, ARC_TIMER_MAX);
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/* Needs apriori irq_set_percpu_devid() done in intc map function */
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ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
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"Timer0 (per-cpu-tick)", evt);
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if (ret)
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pr_err("Unable to register interrupt\n");
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panic("clockevent: unable to request irq\n");
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enable_percpu_irq(arc_timer_irq, 0);
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}
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CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_clockevent_setup);
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/*
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* Called from start_kernel() - boot CPU only
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@ -299,7 +329,6 @@ static void __init arc_clockevent_setup(void)
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* -Also sets up any global state needed for timer subsystem:
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* - for "counting" timer, registers a clocksource, usable across CPUs
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* (provided that underlying counter h/w is synchronized across cores)
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* - for "event" timer, sets up TIMER0 IRQ (as that is platform agnostic)
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*/
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void __init time_init(void)
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{
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@ -315,7 +344,5 @@ void __init time_init(void)
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* CLK upto 4.29 GHz can be safely represented in 32 bits
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* because Max 32 bit number is 4,294,967,295
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*/
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clocksource_register_hz(&arc_counter, arc_get_core_freq());
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arc_clockevent_setup();
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clocksource_register_hz(&arc_counter, arc_timer_freq);
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}
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