Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

This allows that device tree enables platform to setup a runtime IO mapping for the chip id

Browse source 
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJReVkKAAoJEA0Cl+kVi2xqQMQP/3r2I9lir6uKXF/WIFgzYMUp
 6PHaISZex6gvBOUmVKo2akkH8iqQNNqQLjt0TQ/ZMQ3HByj0A6qZ+RnMZhReNs1d
 6tu/PaE5pV5cp4I97fx0MyHoLsySqmC9fbwM78YDCb4hwpcDLpvK45CMvQ4Uc56N
 xvIC0DGhLK5kZrBy3+SolfHvOMn3F5Lfc6+VpZxxZgTUS1oMTtTwe/iUOjnhEL5C
 Qnjkpc2R4IERMRNtNgeWOwjMwj+vHv2tIz0K+3/hXe34AqYX0gFYm2mB88Bi5tK8
 lUt7e1hz9QKobPgike7rCtj/Ap8EkFuC0yGLOiLHA21HeyiTLCkV77ennSs/00kc
 ijeQmG382C8CqDvjKpXhaP7gPQQcUIC95EncS1ts+iM/dcbUjbYdiV677QjARm+U
 BMIw/fzTIs3uI2TRA7RMzQtlsbTfdVtVZJJx2HfpiKdpQWhT+B+mCS/KOf22D9cj
 KGoF7AKvLAUIlbYdgB2eloavM3tAYTJtuWQEnmp//YtcOUVaESDRn/01Y7lDYpLX
 VF8jayav4pu2cDiSnvFDsBj7gGlFhdcu4pPwpoRvKVKeKJZJHwo/0Yv0f3dNbqKa
 2loO9AdgSH//g5Y3SPbVBr4HYCSpn+S0K63hmwXhpxbHtQsj2D1OQ640YSggdkj1
 tU4rwoM24digFbOZvrQk
 =sRUG
 -----END PGP SIGNATURE-----

Merge tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into late/dt

From Kukjin Kim:
This allows that device tree enables platform to setup a runtime IO
mapping for the chip id

* tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-04-28 12:24:08 -07:00
commit 775c4f66fd
4 changed files with 40 additions and 24 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
arch/arm/boot/dts/exynos4.dtsi
View file

@ -38,6 +38,11 @@
i2c7 = &i2c_7;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
pd_mfc: mfc-power-domain@10023C40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;

5
arch/arm/boot/dts/exynos5250.dtsi
View file

@ -51,6 +51,11 @@
pinctrl3 = &pinctrl_3;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
pd_gsc: gsc-power-domain@0x10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;

53
arch/arm/mach-exynos/common.c
View file

@ -119,17 +119,6 @@ static struct map_desc exynos_iodesc[] __initdata = {
},
};
#ifdef CONFIG_ARCH_EXYNOS5
static struct map_desc exynos5440_iodesc[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_CHIPID,
.pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID),
.length = SZ_4K,
.type = MT_DEVICE,
},
};
#endif
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@ -320,6 +309,31 @@ void __init exynos_init_late(void)
exynos_pm_late_initcall();
}
#ifdef CONFIG_OF
int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
{
struct map_desc iodesc;
__be32 *reg;
unsigned long len;
if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
return 0;
reg = of_get_flat_dt_prop(node, "reg", &len);
if (reg == NULL || len != (sizeof(unsigned long) * 2))
return 0;
iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
iodesc.length = be32_to_cpu(reg[1]) - 1;
iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
iodesc.type = MT_DEVICE;
iotable_init(&iodesc, 1);
return 1;
}
#endif
/*
* exynos_map_io
*
@ -328,19 +342,12 @@ void __init exynos_init_late(void)
void __init exynos_init_io(struct map_desc *mach_desc, int size)
{
struct map_desc *iodesc = exynos_iodesc;
int iodesc_sz = ARRAY_SIZE(exynos_iodesc);
#if defined(CONFIG_OF) && defined(CONFIG_ARCH_EXYNOS5)
unsigned long root = of_get_flat_dt_root();
/* initialize the io descriptors we need for initialization */
if (of_flat_dt_is_compatible(root, "samsung,exynos5440")) {
iodesc = exynos5440_iodesc;
iodesc_sz = ARRAY_SIZE(exynos5440_iodesc);
}
#ifdef CONFIG_OF
if (initial_boot_params)
of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
else
#endif
iotable_init(iodesc, iodesc_sz);
iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
if (mach_desc)
iotable_init(mach_desc, size);

1
arch/arm/mach-exynos/include/mach/map.h
View file

@ -53,7 +53,6 @@
#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
#define EXYNOS_PA_CHIPID 0x10000000
#define EXYNOS5440_PA_CHIPID 0x00160000
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100