[POWERPC] 8xx: fix swap
This makes swap routines operate correctly on the ppc_8xx based machines. Code has been revalidated on mpc885ads (8M sdram) with recent kernel. Based on patch from Yuri Tikhonov <yur@emcraft.com> to do the same on arch/ppc instance. Recent kernel's size makes swap feature very important on low-memory platforms, those are actually non-operable without it. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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2 changed files with 29 additions and 9 deletions
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@ -332,8 +332,18 @@ InstructionTLBMiss:
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mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
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lwz r10, 0(r11) /* Get the pte */
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#ifdef CONFIG_SWAP
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/* do not set the _PAGE_ACCESSED bit of a non-present page */
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andi. r11, r10, _PAGE_PRESENT
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beq 4f
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ori r10, r10, _PAGE_ACCESSED
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mfspr r11, SPRN_MD_TWC /* get the pte address again */
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stw r10, 0(r11)
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4:
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#else
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ori r10, r10, _PAGE_ACCESSED
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stw r10, 0(r11)
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#endif
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/* The Linux PTE won't go exactly into the MMU TLB.
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* Software indicator bits 21, 22 and 28 must be clear.
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@ -398,8 +408,17 @@ DataStoreTLBMiss:
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DO_8xx_CPU6(0x3b80, r3)
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mtspr SPRN_MD_TWC, r11
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mfspr r11, SPRN_MD_TWC /* get the pte address again */
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#ifdef CONFIG_SWAP
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/* do not set the _PAGE_ACCESSED bit of a non-present page */
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andi. r11, r10, _PAGE_PRESENT
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beq 4f
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ori r10, r10, _PAGE_ACCESSED
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4:
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/* and update pte in table */
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#else
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ori r10, r10, _PAGE_ACCESSED
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#endif
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mfspr r11, SPRN_MD_TWC /* get the pte address again */
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stw r10, 0(r11)
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/* The Linux PTE won't go exactly into the MMU TLB.
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@ -507,7 +526,16 @@ DataTLBError:
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/* Update 'changed', among others.
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*/
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#ifdef CONFIG_SWAP
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ori r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE
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/* do not set the _PAGE_ACCESSED bit of a non-present page */
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andi. r11, r10, _PAGE_PRESENT
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beq 4f
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ori r10, r10, _PAGE_ACCESSED
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4:
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#else
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ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
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#endif
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mfspr r11, SPRN_MD_TWC /* Get pte address again */
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stw r10, 0(r11) /* and update pte in table */
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@ -339,14 +339,6 @@ extern int icache_44x_need_flush;
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#define _PMD_PAGE_MASK 0x000c
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#define _PMD_PAGE_8M 0x000c
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/*
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* The 8xx TLB miss handler allegedly sets _PAGE_ACCESSED in the PTE
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* for an address even if _PAGE_PRESENT is not set, as a performance
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* optimization. This is a bug if you ever want to use swap unless
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* _PAGE_ACCESSED is 2, which it isn't, or unless you have 8xx-specific
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* definitions for __swp_entry etc. below, which would be gross.
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* -- paulus
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*/
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#define _PTE_NONE_MASK _PAGE_ACCESSED
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#else /* CONFIG_6xx */
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